X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8360EMDS.h;h=b9b5eaba2e728a192565707a4ff621895af610a8;hb=779b534385adf0a1efdd8b40dbacae11598575b8;hp=b072e84473b593c4d53c235403986bd5a9659ff4;hpb=79f516bccc3cff5a5cd4b3dffb7d254e746fdbde;p=u-boot

diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h
index b072e84473..b9b5eaba2e 100644
--- a/include/configs/MPC8360EMDS.h
+++ b/include/configs/MPC8360EMDS.h
@@ -185,7 +185,8 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR		(LCRR_DBYP | LCRR_CLKDIV_4)
+#define CONFIG_SYS_LCRR_DBYP	LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR		0x00000000
 
 /*
@@ -382,6 +383,8 @@
 #define CONFIG_NET_MULTI	1
 #endif
 
+#define CONFIG_HWCONFIG		1
+
 /*
  * QE UEC ethernet configuration
  */
@@ -397,7 +400,8 @@
 #define CONFIG_SYS_UEC1_TX_CLK		QE_CLK9
 #define CONFIG_SYS_UEC1_ETH_TYPE	GIGA_ETH
 #define CONFIG_SYS_UEC1_PHY_ADDR	0
-#define CONFIG_SYS_UEC1_INTERFACE_MODE ENET_1000_GMII
+#define CONFIG_SYS_UEC1_INTERFACE_TYPE RGMII_ID
+#define CONFIG_SYS_UEC1_INTERFACE_SPEED 1000
 #endif
 
 #define CONFIG_UEC_ETH2		/* GETH2 */
@@ -408,7 +412,8 @@
 #define CONFIG_SYS_UEC2_TX_CLK		QE_CLK4
 #define CONFIG_SYS_UEC2_ETH_TYPE	GIGA_ETH
 #define CONFIG_SYS_UEC2_PHY_ADDR	1
-#define CONFIG_SYS_UEC2_INTERFACE_MODE ENET_1000_GMII
+#define CONFIG_SYS_UEC2_INTERFACE_TYPE RGMII_ID
+#define CONFIG_SYS_UEC2_INTERFACE_SPEED 1000
 #endif
 
 /*
@@ -582,9 +587,7 @@
 
 #if defined(CONFIG_UEC_ETH)
 #define CONFIG_HAS_ETH0
-#define CONFIG_ETHADDR	00:04:9f:ef:01:01
 #define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 00:04:9f:ef:01:02
 #endif
 
 #define CONFIG_BAUDRATE 115200