X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC837XEMDS.h;h=cebd175ff593de557760c5c014d011e887174aba;hb=10a28644941327dc26760bc06294a5f588b46d30;hp=8c2af084a160c874d3c57149ab00d393cf26d9a2;hpb=2fef402097866b4172d7a966a72397a5ccba5b10;p=u-boot diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 8c2af084a1..cebd175ff5 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -2,30 +2,19 @@ * Copyright (C) 2007 Freescale Semiconductor, Inc. * Dave Liu * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO + /* * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 family */ -#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC837x 1 /* MPC837x CPU specific */ #define CONFIG_MPC837XEMDS 1 /* MPC837XEMDS board specific */ @@ -243,19 +232,20 @@ /* Window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_LBLAWAR0_PRELIM 0x80000018 /* 32MB window size */ +#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_32MB) #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ - | (2 << BR_PS_SHIFT) /* 16 bit port */ \ - | BR_V) /* valid */ -#define CONFIG_SYS_OR0_PRELIM ((~(CONFIG_SYS_FLASH_SIZE - 1) << 20) \ + | BR_PS_16 /* 16 bit port */ \ + | BR_MS_GPCM /* MSEL = GPCM */ \ + | BR_V) /* valid */ +#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \ | OR_UPM_XAM \ | OR_GPCM_CSNT \ | OR_GPCM_ACS_DIV2 \ | OR_GPCM_XACS \ | OR_GPCM_SCY_15 \ - | OR_GPCM_TRLX \ - | OR_GPCM_EHTR \ + | OR_GPCM_TRLX_SET \ + | OR_GPCM_EHTR_SET \ | OR_GPCM_EAD) /* 0xFE000FF7 */ @@ -272,27 +262,37 @@ #define CONFIG_SYS_BCSR 0xF8000000 /* Access window base at BCSR base */ #define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_BCSR -#define CONFIG_SYS_LBLAWAR1_PRELIM 0x8000000E /* Access window size 32K */ - - /* Port size=8bit, MSEL=GPCM */ -#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR | 0x00000801) -#define CONFIG_SYS_OR1_PRELIM 0xFFFFE9f7 /* length 32K */ +#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB) + +#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR \ + | BR_PS_8 \ + | BR_MS_GPCM \ + | BR_V) + /* 0xF8000801 */ +#define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB \ + | OR_GPCM_XAM \ + | OR_GPCM_CSNT \ + | OR_GPCM_XACS \ + | OR_GPCM_SCY_15 \ + | OR_GPCM_TRLX_SET \ + | OR_GPCM_EHTR_SET \ + | OR_GPCM_EAD) + /* 0xFFFFE9F7 */ /* * NAND Flash on the Local Bus */ #define CONFIG_CMD_NAND 1 -#define CONFIG_MTD_NAND_VERIFY_WRITE 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_NAND_FSL_ELBC 1 -#define CONFIG_SYS_NAND_BASE 0xE0600000 /* 0xE0600000 */ +#define CONFIG_SYS_NAND_BASE 0xE0600000 #define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_NAND_BASE \ - | (2< " -#endif /* Pass open firmware flat tree */ #define CONFIG_OF_LIBFDT 1 @@ -332,14 +329,12 @@ #define CONFIG_OF_STDOUT_VIA_ALIAS 1 /* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CONFIG_FSL_I2C -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x51} /* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x51} } /* * Config on-board RTC @@ -386,6 +381,7 @@ #define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000 #ifdef CONFIG_PCI +#define CONFIG_PCI_INDIRECT_BRIDGE #ifndef __ASSEMBLY__ extern int board_pci_host_broken(void); #endif @@ -393,6 +389,11 @@ extern int board_pci_host_broken(void); #define CONFIG_PQ_MDS_PIB 1 /* PQ MDS Platform IO Board */ #define CONFIG_HAS_FSL_DR_USB 1 /* fixup device tree for the DR USB */ +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_PCI_PNP /* do pci plug-and-play */ @@ -489,8 +490,6 @@ extern int board_pci_host_broken(void); /* * Command line configuration. */ -#include - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII @@ -500,11 +499,6 @@ extern int board_pci_host_broken(void); #define CONFIG_CMD_PCI #endif -#if defined(CONFIG_SYS_RAMBOOT) - #undef CONFIG_CMD_SAVEENV - #undef CONFIG_CMD_LOADS -#endif - #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ @@ -528,7 +522,6 @@ extern int board_pci_host_broken(void); */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ @@ -541,7 +534,6 @@ extern int board_pci_host_broken(void); #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ /* * For booting Linux, the board info and command line data @@ -669,7 +661,6 @@ extern int board_pci_host_broken(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /*