X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8555CDS.h;h=675ca874f6a0857e3944f191386a5be2e44f0838;hb=4a41cc157870cf752795adef811fa7ca9cb1b974;hp=7f0f927ea127aaeeb40d1682d4d5f28cb33c66cb;hpb=85b8c5c4bf80025de4632ae6c9a8a606e51508a4;p=u-boot diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 7f0f927ea1..675ca874f6 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -16,7 +16,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41 */ #define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_MPC8555 1 /* MPC8555 specific */ #define CONFIG_MPC8555CDS 1 /* MPC8555CDS board specific */ @@ -51,7 +50,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_FSL_DDR1 +#define CONFIG_SYS_FSL_DDR1 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #undef CONFIG_FSL_DDR_INTERACTIVE @@ -365,14 +364,11 @@ extern unsigned long get_clock_freq(void); /* * Command line configuration. */ -#include - #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII #define CONFIG_CMD_ELF #define CONFIG_CMD_IRQ -#define CONFIG_CMD_SETEXPR #define CONFIG_CMD_REGINFO #if defined(CONFIG_PCI) @@ -408,21 +404,15 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* * Environment Configuration */ - -/* The mac addresses for all ethernet interface */ #if defined(CONFIG_TSEC_ENET) #define CONFIG_HAS_ETH0 -#define CONFIG_ETHADDR 00:E0:0C:00:00:FD #define CONFIG_HAS_ETH1 -#define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD #define CONFIG_HAS_ETH2 -#define CONFIG_ETH2ADDR 00:E0:0C:00:02:FD #endif #define CONFIG_IPADDR 192.168.1.253