X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8560ADS.h;h=ac78d481d68ce2980b652fc2b8ee3e00837e40e4;hb=d80149b249a7137c8c3b5c011580db37e4b32561;hp=e03fea3cc93827f4a599d6dac425a5b3f5f9adcb;hpb=e46fedfeb214d118b9983d11fcc929ed49f5ccd7;p=u-boot diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index e03fea3cc9..ac78d481d6 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -3,23 +3,7 @@ * (C) Copyright 2002,2003 Motorola,Inc. * Xianghua Xiao * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -37,7 +21,6 @@ /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ #define CONFIG_CPM2 1 /* has CPM2 */ #define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific */ #define CONFIG_MPC8560 1 @@ -49,6 +32,7 @@ #define CONFIG_SYS_TEXT_BASE 0xfff80000 #define CONFIG_PCI +#define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */ @@ -90,7 +74,7 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_FSL_DDR1 +#define CONFIG_SYS_FSL_DDR1 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #undef CONFIG_FSL_DDR_INTERACTIVE @@ -243,7 +227,6 @@ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #endif /* pass open firmware flat tree */ @@ -254,13 +237,12 @@ /* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ -#undef CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* RapidIO MMU */ #define CONFIG_SYS_RIO_MEM_VIRT 0xc0000000 /* base address */ @@ -283,7 +265,6 @@ #if defined(CONFIG_PCI) -#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ #undef CONFIG_EEPRO100 @@ -303,10 +284,6 @@ #ifdef CONFIG_TSEC_ENET -#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #ifndef CONFIG_MII #define CONFIG_MII 1 /* MII PHY management */ #endif @@ -338,8 +315,8 @@ * - Select bus for bd/buffers * - Full duplex */ - #define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) - #define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) + #define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) + #define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) #define CONFIG_SYS_CPMFCR_RAMTYPE 0 #define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE) #define FETH2_RST 0x01 @@ -439,7 +416,6 @@ #define CONFIG_CMDLINE_EDITING /* Command-line editing */ #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default load address */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ @@ -450,7 +426,6 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ /* * For booting Linux, the board info and command line data @@ -462,7 +437,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif @@ -485,8 +459,8 @@ #define CONFIG_IPADDR 192.168.1.253 #define CONFIG_HOSTNAME unknown -#define CONFIG_ROOTPATH /nfsroot -#define CONFIG_BOOTFILE your.uImage +#define CONFIG_ROOTPATH "/nfsroot" +#define CONFIG_BOOTFILE "your.uImage" #define CONFIG_SERVERIP 192.168.1.1 #define CONFIG_GATEWAYIP 192.168.1.1