X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FMVBLM7.h;h=04d97cd1dcdd406600605559bdae5ba9a6fd3c64;hb=d98b0523cfaaedeecb263b15c121c0727b0d80b9;hp=80334bd607e9cdf5a290af107ff9b5b529c60899;hpb=28887d831b02c66ccc10d7f1379204b5a62f4543;p=u-boot

diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h
index 80334bd607..04d97cd1dc 100644
--- a/include/configs/MVBLM7.h
+++ b/include/configs/MVBLM7.h
@@ -37,6 +37,8 @@
 #define CONFIG_MPC834x	1
 #define CONFIG_MPC8343	1
 
+#define	CONFIG_SYS_TEXT_BASE	0xFFF00000
+
 #define CONFIG_SYS_IMMR		0xE0000000
 
 #define CONFIG_PCI
@@ -116,7 +118,7 @@
 /*
  * U-Boot memory configuration
  */
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
 #undef	CONFIG_SYS_RAMBOOT
 
 #define CONFIG_SYS_INIT_RAM_LOCK
@@ -137,7 +139,8 @@
  * External Local Bus rate is
  *  CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
  */
-#define CONFIG_SYS_LCRR	(LCRR_DBYP | LCRR_CLKDIV_4)
+#define CONFIG_SYS_LCRR_DBYP	LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR	0x00000000
 
 /* LB sdram refresh timer, about 6us */
@@ -149,7 +152,6 @@
  * Serial Port
  */
 #define CONFIG_CONS_INDEX	1
-#undef	CONFIG_SERIAL_SOFTWARE_FIFO
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	1
@@ -186,7 +188,7 @@
 #define CONFIG_NET_MULTI	1
 #define CONFIG_NET_RETRY_COUNT	3
 
-#define PCI_66M
+#define CONFIG_PCI_66M
 #define CONFIG_83XX_CLKIN	66666667
 #define CONFIG_PCI_PNP
 #define CONFIG_PCI_SCAN_SHOW
@@ -233,7 +235,11 @@
 #define CONFIG_BOOTP_SEND_HOSTNAME
 
 /* USB */
+#define CONFIG_SYS_USB_HOST
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_FSL
 #define CONFIG_HAS_FSL_DR_USB
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 
 /*
  * Environment
@@ -266,6 +272,8 @@
 #define CONFIG_CMD_PCI
 #define CONFIG_CMD_I2C
 #define CONFIG_CMD_FPGA
+#define CONFIG_CMD_USB
+#define CONFIG_DOS_PARTITION
 
 #undef CONFIG_WATCHDOG
 
@@ -274,6 +282,7 @@
  */
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_CMDLINE_EDITING
+#define CONFIG_AUTO_COMPLETE		/* add autocompletion support   */
 #define CONFIG_SYS_HUSH_PARSER
 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
 
@@ -292,10 +301,10 @@
 
 /*
  * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
+ * have to be in the first 256 MB of memory, since this is
  * the maximum mapped by the Linux kernel during initialization.
  */
-#define CONFIG_SYS_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
+#define CONFIG_SYS_BOOTMAPSZ	(256 << 20)	/* Initial Memory map for Linux*/
 
 #define CONFIG_SYS_HRCW_LOW	0x0
 #define CONFIG_SYS_HRCW_HIGH	0x0
@@ -319,7 +328,8 @@
 #define CONFIG_SYS_SICRL	(SICRL_LDP_A | SICRL_USB1 | SICRL_USB0)
 
 #define CONFIG_SYS_HID0_INIT	0x000000000
-#define CONFIG_SYS_HID0_FINAL	CONFIG_SYS_HID0_INIT
+#define CONFIG_SYS_HID0_FINAL	(CONFIG_SYS_HID0_INIT | \
+				 HID0_ENABLE_INSTRUCTION_CACHE)
 
 #define CONFIG_SYS_HID2	HID2_HBE
 #define CONFIG_HIGH_BATS	1
@@ -370,15 +380,6 @@
 #define CONFIG_SYS_DBAT7L	CONFIG_SYS_IBAT7L
 #define CONFIG_SYS_DBAT7U	CONFIG_SYS_IBAT7U
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD	0x01	/* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM	0x02	/* Software reboot */
-
-
 /*
  * Environment Configuration
  */
@@ -399,8 +400,8 @@
 #define MV_FPGA_SIZE		0
 #define MV_KERNEL_ADDR		0xff810000
 #define MV_INITRD_ADDR		0xffb00000
-#define MV_SOURCE_ADDR		0xff804000
-#define MV_SOURCE_ADDR2		0xff806000
+#define MV_SCRIPT_ADDR		0xff804000
+#define MV_SCRIPT_ADDR2		0xff806000
 #define MV_DTB_ADDR		0xff808000
 #define MV_INITRD_LENGTH	0x00400000
 
@@ -410,9 +411,9 @@
 #define MV_DTB_ADDR_RAM		0x00600000
 #define MV_INITRD_ADDR_RAM	0x01000000
 
-#define CONFIG_BOOTCOMMAND	"if imi ${autoscr_addr}; \
-					then source ${autoscr_addr};  \
-					else source ${autoscr_addr2}; \
+#define CONFIG_BOOTCOMMAND	"if imi ${script_addr}; \
+					then source ${script_addr};  \
+					else source ${script_addr2}; \
 				fi;"
 #define CONFIG_BOOTARGS		"root=/dev/ram ro rootfstype=squashfs"
 
@@ -425,8 +426,8 @@
 	"fpga=0\0"						\
 	"fpgadata=" MK_STR(MV_FPGA_DATA) "\0"			\
 	"fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0"		\
-	"autoscr_addr=" MK_STR(MV_SOURCE_ADDR) "\0"		\
-	"autoscr_addr2=" MK_STR(MV_SOURCE_ADDR2) "\0"		\
+	"script_addr=" MK_STR(MV_SCRIPT_ADDR) "\0"		\
+	"script_addr2=" MK_STR(MV_SCRIPT_ADDR2) "\0"		\
 	"mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0"		\
 	"mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0"	\
 	"mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0"		\