X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FP2020COME.h;h=05a75d8a7633841b2a876c7c7f5e50e2a4e0acac;hb=ca85eb8c4271509aaac1ccb26ae3eb1a7827b4e6;hp=c75f86cb8445dd76af3a5b0d5779ac84544cb36d;hpb=bffe31c144909722eb8b5878992fdf402cd42f9d;p=u-boot

diff --git a/include/configs/P2020COME.h b/include/configs/P2020COME.h
index c75f86cb84..05a75d8a76 100644
--- a/include/configs/P2020COME.h
+++ b/include/configs/P2020COME.h
@@ -58,6 +58,7 @@
 #define CONFIG_PCIE3		1	/* PCIE controller 3 (slot 3) */
 
 #define CONFIG_FSL_PCI_INIT	1	/* Use common FSL init code */
+#define CONFIG_PCI_INDIRECT_BRIDGE 1	/* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET	1	/* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT	1	/* enable 64-bit PCI resources */
 #endif /* #if defined(CONFIG_PCI) */