X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FP4080DS.h;h=4a2e47513d6015ed325c93cf2ed1796e507d1145;hb=877012df309329a9264e6e9558d4f71bfa0cddbe;hp=950c8bcaf609ff0d68363ebddfabbfcc119fdea8;hpb=1d2c2a62e328db22c38e3dfb3c0a8a373333471b;p=u-boot

diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h
index 950c8bcaf6..4a2e47513d 100644
--- a/include/configs/P4080DS.h
+++ b/include/configs/P4080DS.h
@@ -26,21 +26,12 @@
 #define CONFIG_P4080DS
 #define CONFIG_PHYS_64BIT
 #define CONFIG_PPC_P4080
-#define CONFIG_SYS_NUM_FMAN		2
-#define CONFIG_SYS_NUM_FM1_DTSEC	4
-#define CONFIG_SYS_NUM_FM2_DTSEC	4
-#define CONFIG_SYS_NUM_FM1_10GEC	1
-#define CONFIG_SYS_NUM_FM2_10GEC	1
-#define CONFIG_NUM_DDR_CONTROLLERS	2
 
-#define CONFIG_ICS307_REFCLK_HZ		33333000  /* ICS307 ref clk freq */
+#define CONFIG_FSL_NGPIXIS		/* use common ngPIXIS code */
 
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC135
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC136
+#define CONFIG_MMC
+#define CONFIG_PCIE3
 
-#define CONFIG_SYS_P4080_ERRATUM_CPU22
-#define CONFIG_SYS_FSL_ERRATUM_CPC_A002
-#define CONFIG_SYS_P4080_ERRATUM_SERDES8
+#define CONFIG_ICS307_REFCLK_HZ		33333000  /* ICS307 ref clk freq */
 
 #include "corenet_ds.h"