X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FPCIPPC6.h;h=16d6450d91664caa7bd7110dfbaab130af4c30ad;hb=0dd78fb9430e57ccc8e63369c6082b1c730f8aeb;hp=bc6748044971d5b1696047ad0df723e79b515c66;hpb=8515f081e4d5e1f22ee7d12ae72e3bf22eb88a76;p=u-boot diff --git a/include/configs/PCIPPC6.h b/include/configs/PCIPPC6.h index bc67480449..16d6450d91 100644 --- a/include/configs/PCIPPC6.h +++ b/include/configs/PCIPPC6.h @@ -43,6 +43,8 @@ #define CONFIG_PCIPPC2 1 /* this is a PCIPPC2 board */ +#define CONFIG_SYS_TEXT_BASE 0xfff00000 + #define CONFIG_BOARD_EARLY_INIT_F 1 #define CONFIG_MISC_INIT_R 1 @@ -119,7 +121,7 @@ #define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -138,13 +140,9 @@ * Definitions for initial stack pointer and data area */ -/* Size in bytes reserved for initial data - */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 - #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_END 0x8000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_INIT_RAM_LOCK @@ -240,14 +238,6 @@ L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT) #define L2_ENABLE (L2_INIT | L2CR_L2E) -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - /*----------------------------------------------------------------------- RTC m48t59 */ @@ -255,7 +245,6 @@ #define CONFIG_WATCHDOG -#define CONFIG_NET_MULTI /* Multi ethernet cards support */ #define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */