X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FSIMPC8313.h;h=c0ffb33129d6bad831b6cb6a7297e709765f129e;hb=30372965d3d5d42258ebc39d7d06522b4c18472a;hp=b1ed254fe665fc0f5686a4780183dde1018ad3ef;hpb=bb0f5bc92dfe32a7d70211056b9a5fd01f61185c;p=u-boot

diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h
index b1ed254fe6..c0ffb33129 100644
--- a/include/configs/SIMPC8313.h
+++ b/include/configs/SIMPC8313.h
@@ -144,33 +144,32 @@
 #endif
 #define CONFIG_SYS_FPGA_BASE		0xFF000000
 
+#define CONFIG_CMD_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS			1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND			1
 #define CONFIG_NAND_FSL_ELBC		1
 
 #define CONFIG_SYS_NAND_BR_PRELIM	(CONFIG_SYS_NAND_BASE \
-				| (2<<BR_DECC_SHIFT)	/* Use HW ECC */ \
+				| BR_DECC_CHK_GEN	/* Use HW ECC */ \
 				| BR_PS_8		/* 8 bit Port */ \
 				| BR_MS_FCM		/* MSEL = FCM */ \
 				| BR_V)			/* valid */
 
 #ifdef CONFIG_NAND_SP
-#define CONFIG_SYS_NAND_OR_PRELIM	(0xFFFF8000	/* length 32K */ \
+#define CONFIG_SYS_NAND_OR_PRELIM	(OR_AM_32KB \
 					| OR_FCM_CSCT \
 					| OR_FCM_CST \
 					| OR_FCM_CHT \
 					| OR_FCM_SCY_1 \
 					| OR_FCM_TRLX \
 					| OR_FCM_EHTR)
-#define CONFIG_SYS_LBLAWAR0_PRELIM	0x8000000E	/* 32KB */
-#define CONFIG_SYS_NAND_PAGE_SIZE	(512)	/* NAND chip page size */
+#define CONFIG_SYS_LBLAWAR0_PRELIM	(LBLAWAR_EN | LBLAWAR_32KB)
+#define CONFIG_SYS_NAND_PAGE_SIZE	512	/* NAND chip page size */
 					/* NAND chip block size */
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(16 << 10)
 #define NAND_CACHE_PAGES		32
 #elif defined(CONFIG_NAND_LP)
-#define CONFIG_SYS_NAND_OR_PRELIM	(0xFFFC0000	/* length 256K */ \
+#define CONFIG_SYS_NAND_OR_PRELIM	(OR_AM_256KB \
 					| OR_FCM_PGS \
 					| OR_FCM_CSCT \
 					| OR_FCM_CST \
@@ -178,8 +177,8 @@
 					| OR_FCM_SCY_1 \
 					| OR_FCM_TRLX \
 					| OR_FCM_EHTR)
-#define CONFIG_SYS_LBLAWAR0_PRELIM	0x80000011	/* 256KB */
-#define CONFIG_SYS_NAND_PAGE_SIZE	(2048)	/* NAND chip page size */
+#define CONFIG_SYS_LBLAWAR0_PRELIM	(LBLAWAR_EN | LBLAWAR_256KB)
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048	/* NAND chip page size */
 					/* NAND chip block size */
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128 << 10)
 #define NAND_CACHE_PAGES		64
@@ -243,7 +242,6 @@
 
 /* Use the HUSH parser */
 #define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
 
 /* I2C */
 #define CONFIG_HARD_I2C		/* I2C with hardware support*/
@@ -447,26 +445,26 @@
 #define CONFIG_HIGH_BATS	1	/* High BATs supported */
 
 /* DDR @ 0x00000000 */
-#define CONFIG_SYS_IBAT0L	(CONFIG_SYS_SDRAM_BASE | BATL_PP_10)
+#define CONFIG_SYS_IBAT0L	(CONFIG_SYS_SDRAM_BASE | BATL_PP_RW)
 #define CONFIG_SYS_IBAT0U	(CONFIG_SYS_SDRAM_BASE \
 				| BATU_BL_256M \
 				| BATU_VS \
 				| BATU_VP)
 #define CONFIG_SYS_IBAT1L	((CONFIG_SYS_SDRAM_BASE + 0x10000000) \
-				| BATL_PP_10)
+				| BATL_PP_RW)
 #define CONFIG_SYS_IBAT1U	((CONFIG_SYS_SDRAM_BASE + 0x10000000) \
 				| BATU_BL_256M \
 				| BATU_VS \
 				| BATU_VP)
 
 /* PCI @ 0x80000000 */
-#define CONFIG_SYS_IBAT2L	(CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_10)
+#define CONFIG_SYS_IBAT2L	(CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW)
 #define CONFIG_SYS_IBAT2U	(CONFIG_SYS_PCI1_MEM_BASE \
 				| BATU_BL_256M \
 				| BATU_VS \
 				| BATU_VP)
 #define CONFIG_SYS_IBAT3L	(CONFIG_SYS_PCI1_MMIO_BASE \
-				| BATL_PP_10 \
+				| BATL_PP_RW \
 				| BATL_CACHEINHIBIT \
 				| BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT3U	(CONFIG_SYS_PCI1_MMIO_BASE \
@@ -480,7 +478,7 @@
 
 /* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 */
 #define CONFIG_SYS_IBAT5L	(CONFIG_SYS_IMMR \
-				| BATL_PP_10 \
+				| BATL_PP_RW \
 				| BATL_CACHEINHIBIT \
 				| BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT5U	(CONFIG_SYS_IMMR \
@@ -490,7 +488,7 @@
 
 /* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
 #define CONFIG_SYS_IBAT6L	(0xF0000000 \
-				| BATL_PP_10 \
+				| BATL_PP_RW \
 				| BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT6U	(0xF0000000 \
 				| BATU_BL_256M \
@@ -539,19 +537,21 @@
 #define CONFIG_BOOTCOMMAND	"nand read $loadaddr kernel 600000;" \
 					"bootm $loadaddr - $fdtaddr"
 
-#define XMK_STR(x)	#x
-#define MK_STR(x)	XMK_STR(x)
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"netdev=" CONFIG_NETDEV "\0"					\
 	"ethprime=TSEC1\0"						\
 	"uboot=" CONFIG_UBOOTPATH "\0"					\
 	"tftpflash=tftpboot $loadaddr $uboot; "				\
-		"protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
-		"erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; "	\
-		"cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
-		"protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
-		"cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
+		"protect off " __stringify(CONFIG_SYS_TEXT_BASE)	\
+			" +$filesize; "	\
+		"erase " __stringify(CONFIG_SYS_TEXT_BASE)		\
+			" +$filesize; "	\
+		"cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE)	\
+			" $filesize; "	\
+		"protect on " __stringify(CONFIG_SYS_TEXT_BASE)		\
+			" +$filesize; "	\
+		"cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE)	\
+			" $filesize\0"	\
 	"fdtaddr=ae0000\0"						\
 	"fdtfile=" CONFIG_FDTFILE "\0"					\
 	"console=ttyS0\0"						\
@@ -594,7 +594,4 @@
 	"tftp $fdtaddr $fdtfile;"					\
 	"bootm $loadaddr $ramdiskaddr $fdtaddr"
 
-#undef MK_STR
-#undef XMK_STR
-
 #endif	/* __CONFIG_H */