X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FTQM8272.h;h=8642a9f610b8332728614829571b48e324b232d6;hb=5a1aceb0689e2f731491838970884a673ef7e7d3;hp=b7a1baebcf4da13ec6a9bb2f7dd32c7b0b5a6f21;hpb=2694690e285acaa34922f55f4b5ae030da60c55a;p=u-boot diff --git a/include/configs/TQM8272.h b/include/configs/TQM8272.h index b7a1baebcf..8642a9f610 100644 --- a/include/configs/TQM8272.h +++ b/include/configs/TQM8272.h @@ -56,7 +56,7 @@ #define CONFIG_BAUDRATE 115200 #endif -#define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo" +#define CONFIG_PREBOOT "echo;echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;echo" #undef CONFIG_BOOTARGS @@ -87,7 +87,7 @@ "cp.b 300000 40000000 40000;" \ "setenv filesize;saveenv\0" \ "cphwib=cp.b 4003fc00 33fc00 400\0" \ - "upd=run load;run cphwib;run update\0" \ + "upd=run load cphwib update\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -97,10 +97,6 @@ /* enable I2C and select the hardware/software driver */ #undef CONFIG_HARD_I2C /* I2C with hardware support */ #define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ -#define ADD_CMD_I2C CFG_CMD_I2C | \ - CFG_CMD_DATE |\ - CFG_CMD_DTT |\ - CFG_CMD_EEPROM #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ #define CFG_I2C_SLAVE 0x7F @@ -140,7 +136,6 @@ #else #undef CONFIG_HARD_I2C #undef CONFIG_SOFT_I2C -#define ADD_CMD_I2C 0 #endif /* @@ -177,8 +172,7 @@ * for FCC) * * if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be - * defined elsewhere (as for the console), or CFG_CMD_NET must be removed - * from CONFIG_COMMANDS to remove support for networking. + * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset. * * (On TQM8272 either SCC1 or FCC2 may be chosen: SCC1 is hardwired to the * X.29 connector, and FCC2 is hardwired to the X.1 connector) @@ -272,7 +266,14 @@ #define CONFIG_TIMESTAMP /* Print image info with timestamp */ -#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE) +/* + * BOOTP options + */ +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_BOOTFILESIZE /* @@ -289,6 +290,13 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_SNTP +#if CONFIG_I2C + #define CONFIG_CMD_I2C + #define CONFIG_CMD_DATE + #define CONFIG_CMD_DTT + #define CONFIG_CMD_EEPROM +#endif + /* * Miscellaneous configurable options @@ -364,7 +372,7 @@ #define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */ #define CFG_FLASH_CFI /* flash is CFI compat. */ -#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver*/ +#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver*/ #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector */ #define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash*/ @@ -373,7 +381,7 @@ #define CFG_UPDATE_FLASH_SIZE -#define CFG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_IS_IN_FLASH 1 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x40000) #define CFG_ENV_SIZE 0x20000 #define CFG_ENV_SECT_SIZE 0x20000 @@ -433,7 +441,7 @@ WRITE_NAND(d, addr); \ } while(0) -#endif /* CFG_CMD_NAND */ +#endif /* CONFIG_CMD_NAND */ #define CONFIG_PCI #ifdef CONFIG_PCI