X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FTQM834x.h;h=07384234c95deb2428bd6498927bf1a76b5c1a32;hb=f3fcf92d595b297b47a1b58b8ec39f93f40ef912;hp=a7f11d3e96bee40bcf1dff530b4cafcefdd53b5f;hpb=df939e1647684982a25e32cb7fdf061ddefa85d9;p=u-boot

diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index a7f11d3e96..07384234c9 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -119,13 +119,12 @@
 					| OR_GPCM_SCY_5 \
 					| OR_GPCM_TRLX)
 
-#define CONFIG_SYS_PRELIM_OR_AM	0xc0000000	/* OR addr mask: 1 GiB */
+#define CONFIG_SYS_PRELIM_OR_AM		OR_AM_1GB /* OR addr mask: 1 GiB */
 
 #define CONFIG_SYS_OR0_PRELIM		(CONFIG_SYS_PRELIM_OR_AM  \
 					| CONFIG_SYS_OR_TIMING_FLASH)
 
-					/* 1 GiB window size (2^(size + 1)) */
-#define CONFIG_SYS_LBLAWAR0_PRELIM	0x8000001D
+#define CONFIG_SYS_LBLAWAR0_PRELIM	(LBLAWAR_EN | LBLAWAR_1GB)
 
 					/* Window base at flash base */
 #define CONFIG_SYS_LBLAWBAR0_PRELIM	CONFIG_SYS_FLASH_BASE
@@ -340,9 +339,6 @@
 #define CONFIG_AUTO_COMPLETE		/* add autocompletion support */
 
 #define CONFIG_SYS_HUSH_PARSER		1	/* Use the HUSH parser */
-#ifdef	CONFIG_SYS_HUSH_PARSER
-#define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#endif
 
 #if defined(CONFIG_CMD_KGDB)
 	#define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
@@ -421,14 +417,14 @@
 
 /* DDR 0 - 512M */
 #define CONFIG_SYS_IBAT0L	(CONFIG_SYS_SDRAM_BASE \
-				| BATL_PP_10 \
+				| BATL_PP_RW \
 				| BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT0U	(CONFIG_SYS_SDRAM_BASE \
 				| BATU_BL_256M \
 				| BATU_VS \
 				| BATU_VP)
 #define CONFIG_SYS_IBAT1L	(CONFIG_SYS_SDRAM_BASE + 0x10000000 \
-				| BATL_PP_10 \
+				| BATL_PP_RW \
 				| BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT1U	(CONFIG_SYS_SDRAM_BASE + 0x10000000 \
 				| BATU_BL_256M \
@@ -437,7 +433,7 @@
 
 /* stack in DCACHE @ 512M (no backing mem) */
 #define CONFIG_SYS_IBAT2L	(CONFIG_SYS_INIT_RAM_ADDR \
-				| BATL_PP_10 \
+				| BATL_PP_RW \
 				| BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT2U	(CONFIG_SYS_INIT_RAM_ADDR \
 				| BATU_BL_128K \
@@ -447,14 +443,14 @@
 /* PCI */
 #ifdef CONFIG_PCI
 #define CONFIG_SYS_IBAT3L	(CONFIG_SYS_PCI1_MEM_BASE \
-				| BATL_PP_10 \
+				| BATL_PP_RW \
 				| BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT3U	(CONFIG_SYS_PCI1_MEM_BASE \
 				| BATU_BL_256M \
 				| BATU_VS \
 				| BATU_VP)
 #define CONFIG_SYS_IBAT4L	(CONFIG_SYS_PCI1_MMIO_BASE \
-				| BATL_PP_10 \
+				| BATL_PP_RW \
 				| BATL_MEMCOHERENCE \
 				| BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT4U	(CONFIG_SYS_PCI1_MMIO_BASE \
@@ -462,7 +458,7 @@
 				| BATU_VS \
 				| BATU_VP)
 #define CONFIG_SYS_IBAT5L	(CONFIG_SYS_PCI1_IO_BASE \
-				| BATL_PP_10 \
+				| BATL_PP_RW \
 				| BATL_CACHEINHIBIT \
 				| BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT5U	(CONFIG_SYS_PCI1_IO_BASE \
@@ -480,7 +476,7 @@
 
 /* IMMRBAR */
 #define CONFIG_SYS_IBAT6L	(CONFIG_SYS_IMMR \
-				| BATL_PP_10 \
+				| BATL_PP_RW \
 				| BATL_CACHEINHIBIT \
 				| BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT6U	(CONFIG_SYS_IMMR \
@@ -490,7 +486,7 @@
 
 /* FLASH */
 #define CONFIG_SYS_IBAT7L	(CONFIG_SYS_FLASH_BASE \
-				| BATL_PP_10 \
+				| BATL_PP_RW \
 				| BATL_CACHEINHIBIT \
 				| BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT7U	(CONFIG_SYS_FLASH_BASE \