X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FVOH405.h;h=96f3d26cc5eea997c1406a525222030180ac36ba;hb=dcaa71562826a2466e894c868d132509dcda8444;hp=d8370ed66d93fefadf26f4969bf9f6b20edb7f62;hpb=a20b27a36b7b1f593e18b4efd506e5f01a392dc6;p=u-boot

diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h
index d8370ed66d..96f3d26cc5 100644
--- a/include/configs/VOH405.h
+++ b/include/configs/VOH405.h
@@ -141,6 +141,8 @@
  * NAND-FLASH stuff
  *-----------------------------------------------------------------------
  */
+#define CFG_NAND_LEGACY
+
 #define CFG_MAX_NAND_DEVICE	1	/* Max number of NAND devices		*/
 #define SECTORSIZE 512
 
@@ -314,7 +316,7 @@
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
-#define CFG_DCACHE_SIZE		16384	/* For IBM 405 CPUs, older 405 ppc's	*/
+#define CFG_DCACHE_SIZE		16384	/* For AMCC 405 CPUs, older 405 ppc's	*/
 					/* have only 8kB, 16kB is save here	*/
 #define CFG_CACHELINE_SIZE	32	/* ...			*/
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
@@ -362,7 +364,7 @@
 #define CFG_LCD_SMALL_MEM       0xF1400000  /* Epson S1D13704 Mem Base Address  */
 #define CFG_LCD_SMALL_REG       0xF140FFE0  /* Epson S1D13704 Reg Base Address  */
 
-#define CFG_LCD_LOGO_MAX_SIZE   (1024*1024)
+#define CFG_VIDEO_LOGO_MAX_SIZE (1 << 20)
 
 /*-----------------------------------------------------------------------
  * FPGA stuff