X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FXPEDITE5200.h;h=1ad9b461d36989fb0d4508915aff4ebda6e083dd;hb=72fb68d53cfbe505319cbb4aa92a1fe7ecf3d4fb;hp=deda20843afb5c79291b4e2e0e75d4288590eed6;hpb=49a7720b215aa3da24bb13266c4c194012f499a6;p=u-boot

diff --git a/include/configs/XPEDITE5200.h b/include/configs/XPEDITE5200.h
index deda20843a..1ad9b461d3 100644
--- a/include/configs/XPEDITE5200.h
+++ b/include/configs/XPEDITE5200.h
@@ -36,8 +36,12 @@
 #define CONFIG_MPC8548		1
 #define CONFIG_XPEDITE5200	1
 #define CONFIG_SYS_BOARD_NAME	"XPedite5200"
+#define CONFIG_SYS_FORM_PMC_XMC	1
 #define CONFIG_BOARD_EARLY_INIT_R	/* Call board_pre_init */
-#define CONFIG_RELOC_FIXUP_WORKS	/* Fully relocate to SDRAM */
+
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE	0xfff80000
+#endif
 
 #define CONFIG_PCI		1	/* Enable PCI/PCIE */
 #define CONFIG_PCI_PNP		1	/* do pci plug-and-play */
@@ -82,7 +86,6 @@
 #define CONFIG_SYS_CCSRBAR		0xef000000	/* relocated CCSRBAR */
 #define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */
 #define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */
-#define CONFIG_SYS_PCI1_ADDR	(CONFIG_SYS_CCSRBAR + 0x8000)
 
 /*
  * Diagnostics
@@ -103,7 +106,7 @@
  * 0xfc00_0000	0xffff_ffff	NOR Flash 1		64M non-cacheable
  */
 
-#define CONFIG_SYS_LBC_LCRR	(LCRR_CLKDIV_4 | LCRR_EADC_3)
+#define CONFIG_SYS_LBC_LCRR	(LCRR_CLKDIV_8 | LCRR_EADC_3)
 
 /*
  * NAND flash configuration
@@ -132,7 +135,7 @@
 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST	{ {0xfff40000, 0xc0000}, \
 						  {0xfbf40000, 0xc0000} }
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE	/* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE	/* start of monitor */
 
 /*
  * Chip select configuration
@@ -214,9 +217,6 @@
 #define CONFIG_OF_BOARD_SETUP		1
 #define CONFIG_OF_STDOUT_VIA_ALIAS	1
 
-#define CONFIG_SYS_64BIT_VSPRINTF	1
-#define CONFIG_SYS_64BIT_STRTOUL	1
-
 /*
  * I2C
  */
@@ -251,7 +251,7 @@
 #define CONFIG_SYS_PCA953X_BRD_CFG2		0x04
 #define CONFIG_SYS_PCA953X_XMC_ROOT0		0x08
 #define CONFIG_SYS_PCA953X_FLASH_PASS_CS	0x10
-#define CONFIG_SYS_PCA953X_FLASH_WP		0x20
+#define CONFIG_SYS_PCA953X_NVM_WP		0x20
 #define CONFIG_SYS_PCA953X_MONARCH		0x40
 #define CONFIG_SYS_PCA953X_EREADY		0x80
 
@@ -269,10 +269,10 @@
  * General PCI
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
-#define CONFIG_SYS_PCI1_MEM_BASE	0x80000000
-#define CONFIG_SYS_PCI1_MEM_PHYS	CONFIG_SYS_PCI1_MEM_BASE
+#define CONFIG_SYS_PCI1_MEM_BUS		0x80000000
+#define CONFIG_SYS_PCI1_MEM_PHYS	CONFIG_SYS_PCI1_MEM_BUS
 #define CONFIG_SYS_PCI1_MEM_SIZE	0x40000000	/* 1G */
-#define CONFIG_SYS_PCI1_IO_BASE		0x00000000
+#define CONFIG_SYS_PCI1_IO_BUS		0x00000000
 #define CONFIG_SYS_PCI1_IO_PHYS		0xe8000000
 #define CONFIG_SYS_PCI1_IO_SIZE		0x00800000	/* 1M */
 
@@ -340,8 +340,10 @@
 #define CONFIG_CMD_PCA953X
 #define CONFIG_CMD_PCA953X_INFO
 #define CONFIG_CMD_PCI
+#define CONFIG_CMD_PCI_ENUM
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_SNTP
+#define CONFIG_CMD_REGINFO
 
 /*
  * Miscellaneous configurable options
@@ -355,6 +357,7 @@
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size */
 #define CONFIG_SYS_HZ		1000		/* decrementer freq: 1ms ticks */
 #define CONFIG_CMDLINE_EDITING	1		/* add command line history	*/
+#define CONFIG_AUTO_COMPLETE	1		/* add autocompletion support */
 #define CONFIG_LOADADDR		0x1000000	/* default location for tftp and bootm */
 #define CONFIG_BOOTDELAY	3		/* -1 disables auto-boot */
 #define CONFIG_PANIC_HANG			/* do not reset board on panic */
@@ -372,12 +375,6 @@
 #define CONFIG_SYS_BOOTMAPSZ	(16 << 20)	/* Initial Memory map for Linux*/
 #define CONFIG_SYS_BOOTM_LEN	(16 << 20)	/* Increase max gunzip size */
 
-/*
- * Boot Flags
- */
-#define BOOTFLAG_COLD		0x01		/* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM		0x02		/* Software reboot */
-
 /*
  * Environment Configuration
  */