X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fa320evb.h;h=a2b347a8288e22e92a45a25fabd0220c2277c4db;hb=962d026b6aaf7d801d182f3188e4bbc106e057e3;hp=fcc556321ba5c41d4a797a6be76cf07db10282f8;hpb=35e3717772c8c3534c18d8aac69e4b822777c23b;p=u-boot diff --git a/include/configs/a320evb.h b/include/configs/a320evb.h index fcc556321b..a2b347a828 100644 --- a/include/configs/a320evb.h +++ b/include/configs/a320evb.h @@ -24,24 +24,41 @@ #include -/*----------------------------------------------------------------------- +/* + * mach-type definition + */ +#define MACH_TYPE_FARADAY 758 +#define CONFIG_MACH_TYPE MACH_TYPE_FARADAY + +/* + * Linux kernel tagged list + */ +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS + +/* * CPU and Board Configuration Options */ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #undef CONFIG_SKIP_LOWLEVEL_INIT -/*----------------------------------------------------------------------- +/* + * Power Management Unit + */ +#define CONFIG_FTPMU010_POWER + +/* * Timer */ #define CONFIG_SYS_HZ 1000 /* timer ticks per second */ -/*----------------------------------------------------------------------- +/* * Real Time Clock */ #define CONFIG_RTC_FTRTC010 -/*----------------------------------------------------------------------- +/* * Serial console configuration */ @@ -54,18 +71,14 @@ #define CONFIG_SYS_NS16550_REG_SIZE -4 #define CONFIG_SYS_NS16550_CLK 18432000 -/* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/*----------------------------------------------------------------------- +/* * Ethernet */ -#define CONFIG_NET_MULTI #define CONFIG_FTMAC100 #define CONFIG_BOOTDELAY 3 -/*----------------------------------------------------------------------- +/* * Command line configuration. */ #include @@ -74,7 +87,7 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_PING -/*----------------------------------------------------------------------- +/* * Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ @@ -91,7 +104,7 @@ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -/*----------------------------------------------------------------------- +/* * Stack sizes * * The stack sizes are set up in start.S using the settings below @@ -102,17 +115,12 @@ #define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */ #endif -/*----------------------------------------------------------------------- +/* * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) -/*----------------------------------------------------------------------- - * size in bytes reserved for initial data -*/ -#define CONFIG_SYS_GBL_DATA_SIZE 128 - -/*----------------------------------------------------------------------- +/* * SDRAM controller configuration */ #define CONFIG_SYS_FTSDMC020_TP0 (FTSDMC020_TP0_TRAS(2) | \ @@ -132,28 +140,35 @@ FTSDMC020_BANK_MBW_32 | \ FTSDMC020_BANK_SIZE_64M) -/*----------------------------------------------------------------------- +/* * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ + GENERATED_GBL_DATA_SIZE) + /* * Load address and memory test area should agree with * board/faraday/a320/config.mk. Be careful not to overwrite U-boot itself. */ -#define CONFIG_SYS_LOAD_ADDR 0x12000000 +#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x2000000) /* memtest works on 63 MB in DRAM */ -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x13F00000 +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x3F00000) -/*----------------------------------------------------------------------- +#define CONFIG_SYS_TEXT_BASE 0 + +/* * Static memory controller configuration */ -#include +#define CONFIG_FTSMC020 +#include #define FTSMC020_BANK0_CONFIG (FTSMC020_BANK_ENABLE | \ FTSMC020_BANK_BASE(PHYS_FLASH_1) | \ @@ -187,7 +202,7 @@ { FTSMC020_BANK1_CONFIG, FTSMC020_BANK1_TIMING, }, \ } -/*----------------------------------------------------------------------- +/* * FLASH and environment organization */ @@ -216,7 +231,7 @@ /* environments */ #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR 0x00060000 +#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) #define CONFIG_ENV_SIZE 0x20000 #endif /* __CONFIG_H */