X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fadp-ag101p.h;h=b42fcfa8d539893fc83fd44f1d79f4530bafc154;hb=7d0f5c1300555101e1625ed7256ee6c3502e8482;hp=ffc70a630b2ba198351689fc8e18419d7d491ad2;hpb=1086c5d6f8541460f0f10e4a302d8aac27e0e6e0;p=u-boot diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index ffc70a630b..b42fcfa8d5 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -3,28 +3,13 @@ * Shawn Lin, Andes Technology Corporation * Macpaul Lin, Andes Technology Corporation * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H -#include +#include /* * CPU and Board Configuration Options @@ -35,25 +20,32 @@ #define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_GENERIC_GLOBAL_DATA + +/* + * Definitions related to passing arguments to kernel. + */ +#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */ +#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */ +#define CONFIG_INITRD_TAG /* send initrd params */ + #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_MEM_REMAP #endif #ifdef CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SYS_TEXT_BASE 0x03200000 +#define CONFIG_SYS_TEXT_BASE 0x00500000 +#else +#ifdef CONFIG_MEM_REMAP +#define CONFIG_SYS_TEXT_BASE 0x80000000 #else #define CONFIG_SYS_TEXT_BASE 0x00000000 #endif +#endif /* * Timer */ - -/* - * According to the discussion in u-boot mailing list before, - * CONFIG_SYS_HZ at 1000 is mandatory. - */ -#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CLK_FREQ 39062500 #define VERSION_CLOCK CONFIG_SYS_CLK_FREQ @@ -92,49 +84,29 @@ */ /* FTUART is a high speed NS 16C550A compatible UART, addr: 0x99600000 */ -#define CONFIG_BAUDRATE 38400 #define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_COM1 CONFIG_FTUART010_02_BASE #define CONFIG_SYS_NS16550_REG_SIZE -4 #define CONFIG_SYS_NS16550_CLK ((18432000 * 20) / 25) /* AG101P */ -/* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - /* * Ethernet */ #define CONFIG_FTMAC100 -#define CONFIG_BOOTDELAY 3 /* * SD (MMC) controller */ -#define CONFIG_MMC -#define CONFIG_CMD_MMC -#define CONFIG_GENERIC_MMC -#define CONFIG_DOS_PARTITION #define CONFIG_FTSDC010 #define CONFIG_FTSDC010_NUMBER 1 -#define CONFIG_CMD_FAT - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_DATE -#define CONFIG_CMD_PING +#define CONFIG_FTSDC010_SDIO /* * Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "NDS32 # " /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ /* Print Buffer Size */ @@ -147,24 +119,12 @@ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - /* * Size of malloc() pool */ /* 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough */ #define CONFIG_SYS_MALLOC_LEN (512 << 10) -/* - * size in bytes reserved for initial data - */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 - /* * AHB Controller configuration */ @@ -246,22 +206,42 @@ #define CONFIG_SYS_FTSDMC021_BANK0_BSR (FTSDMC021_BANK_ENABLE | \ CONFIG_SYS_FTSDMC021_BANK0_BASE) +#define CONFIG_SYS_FTSDMC021_BANK1_BASE \ + (CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE + (PHYS_SDRAM_0_SIZE >> 20)) +#define CONFIG_SYS_FTSDMC021_BANK1_BSR (FTSDMC021_BANK_ENABLE | \ + CONFIG_SYS_FTSDMC021_BANK1_BASE) #endif /* * Physical Memory Map */ -#if defined(CONFIG_MEM_REMAP) || defined(CONFIG_SKIP_LOWLEVEL_INIT) -#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ -#if defined(CONFIG_MEM_REMAP) -#define PHYS_SDRAM_0_AT_INIT 0x10000000 /* SDRAM Bank #1 before remap*/ +#ifdef CONFIG_SKIP_LOWLEVEL_INIT +#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ +#else +#ifdef CONFIG_MEM_REMAP +#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ +#else +#define PHYS_SDRAM_0 0x80000000 /* SDRAM Bank #1 */ #endif -#else /* !CONFIG_SKIP_LOWLEVEL_INIT && !CONFIG_MEM_REMAP */ -#define PHYS_SDRAM_0 0x10000000 /* SDRAM Bank #1 */ #endif -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_0_SIZE 0x04000000 /* 64 MB */ +#define PHYS_SDRAM_1 \ + (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ + +#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 bank of DRAM */ + +#ifdef CONFIG_SKIP_LOWLEVEL_INIT +#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ +#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ +#else +#ifdef CONFIG_MEM_REMAP +#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ +#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ +#else +#define PHYS_SDRAM_0_SIZE 0x08000000 /* 128 MB */ +#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ +#endif +#endif #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 @@ -275,7 +255,7 @@ /* * Load address and memory test area should agree with - * arch/nds32/config.mk. Be careful not to overwrite U-boot itself. + * arch/nds32/config.mk. Be careful not to overwrite U-Boot itself. */ #define CONFIG_SYS_LOAD_ADDR 0x300000 @@ -341,19 +321,20 @@ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* support JEDEC */ /* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */ #ifdef CONFIG_SKIP_LOWLEVEL_INIT -#define PHYS_FLASH_1 0x80400000 /* BANK 1 */ -#else /* !CONFIG_SKIP_LOWLEVEL_INIT */ +#define PHYS_FLASH_1 0x80000000 /* BANK 0 */ +#else #ifdef CONFIG_MEM_REMAP #define PHYS_FLASH_1 0x80000000 /* BANK 0 */ #else #define PHYS_FLASH_1 0x00000000 /* BANK 0 */ +#endif #endif /* CONFIG_MEM_REMAP */ -#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } @@ -368,11 +349,12 @@ * but we have only 1 bank connected to flash on board */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000} /* max number of sectors on one chip */ -#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2*2) +#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2) #define CONFIG_ENV_SECT_SIZE CONFIG_FLASH_SECTOR_SIZE -#define CONFIG_SYS_MAX_FLASH_SECT 128 +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* environments */ #define CONFIG_ENV_IS_IN_FLASH