X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fafeb9260.h;h=36a2a461d16fb94071dc0b89f186b1d32483515c;hb=2a9a2339a4ea04636ed0968e76eeaf784e987f52;hp=f077ad90f41a475ed56df77f38c85cd0332ecf04;hpb=c49dc0b3b8f0fc9ed8e50d17d20e8e65d7abae57;p=u-boot

diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h
index f077ad90f4..36a2a461d1 100644
--- a/include/configs/afeb9260.h
+++ b/include/configs/afeb9260.h
@@ -26,16 +26,15 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-/* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK		18429952	/* from 18.432 MHz crystal */
-#define AT91_MASTER_CLOCK	89999598	/* peripheral = main / 2 */
-#define CFG_AT91_PLLB		0x107c3e18	/* PLLB settings for USB */
-#define CONFIG_SYS_HZ		1000000		/* 1us resolution */
+#define CONFIG_AT91_LEGACY
 
-#define AT91_SLOW_CLOCK		32768	/* slow clock */
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_MAIN_CLOCK		18429952	/* from 18.432 MHz crystal */
+#define CONFIG_SYS_HZ		1000
 
 #define CONFIG_AT91SAM9260	1	/* It's an Atmel AT91SAM9260 SoC*/
 #define CONFIG_AFEB9260		1	/* on an AFEB9260 Board	*/
+#define CONFIG_ARCH_CPU_INIT
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
 
 #define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
@@ -43,11 +42,11 @@
 #define CONFIG_INITRD_TAG	1
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SKIP_RELOCATE_UBOOT
 
 /*
  * Hardware drivers
  */
+#define CONFIG_AT91_GPIO	1
 #define CONFIG_ATMEL_USART	1
 #undef CONFIG_USART0
 #undef CONFIG_USART1
@@ -69,11 +68,11 @@
  */
 #include <config_cmd_default.h>
 #undef CONFIG_CMD_BDI
-#undef CONFIG_CMD_IMI
-#undef CONFIG_CMD_AUTOSCRIPT
 #undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_IMI
 #undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_SOURCE
 
 #define CONFIG_CMD_PING		1
 #define CONFIG_CMD_DHCP		1
@@ -87,6 +86,7 @@
 #define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
 
 /* DataFlash */
+#define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH		1
 #define CONFIG_SYS_SPI_WRITE_TOUT		(5 * CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
@@ -97,10 +97,19 @@
 #define DATAFLASH_TCHS			(0x1 << 24)
 
 /* NAND flash */
-#define NAND_MAX_CHIPS			1
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8			1
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC13
+
+#endif
 
 /* NOR flash - no real flash on this board */
 #define CONFIG_SYS_NO_FLASH		1
@@ -114,8 +123,8 @@
 #define CONFIG_NET_RETRY_COUNT		20
 
 /* USB */
+#define CONFIG_USB_ATMEL
 #define CONFIG_USB_OHCI_NEW		1
-#define LITTLEENDIAN			1
 #define CONFIG_DOS_PARTITION		1
 #define CONFIG_SYS_USB_OHCI_CPU_INIT		1
 #define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000	/* AT91SAM9260_UHP_BASE */
@@ -150,15 +159,13 @@
 #define CONFIG_SYS_CBSIZE		256
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CFG_LONGHELP		1
+#define CONFIG_SYS_LONGHELP		1
 #define CONFIG_CMDLINE_EDITING	1
 
-#define ROUND(A, B)		(((A) + (B)) & ~((B) - 1))
 /*
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* 128 bytes for initial data */
 
 #define CONFIG_STACKSIZE	(32 * 1024)	/* regular stack */
 
@@ -167,4 +174,3 @@
 #endif
 
 #endif
-