X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fap325rxa.h;h=711dd3c3af08d84185711f04a62645075bf1a495;hb=862711154339be2af723adcbde217743de781e81;hp=9134ad1dc4037e030f565fc85c05e5963d6bf252;hpb=50bd0057ba8fceeb48533f8b1a652ccd0e170838;p=u-boot

diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h
index 9134ad1dc4..711dd3c3af 100644
--- a/include/configs/ap325rxa.h
+++ b/include/configs/ap325rxa.h
@@ -40,7 +40,7 @@
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_NFS
 #define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_ENV
+#define CONFIG_CMD_SAVEENV
 #define CONFIG_CMD_IDE
 #define CONFIG_CMD_EXT2
 #define CONFIG_DOS_PARTITION
@@ -53,15 +53,18 @@
 #undef  CONFIG_SHOW_BOOT_PROGRESS
 
 /* SMC9118 */
-#define CONFIG_DRIVER_SMC911X 1
-#define CONFIG_DRIVER_SMC911X_32_BIT 1
-#define CONFIG_DRIVER_SMC911X_BASE 0xB6080000
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC911X 1
+#define CONFIG_SMC911X_32_BIT 1
+#define CONFIG_SMC911X_BASE 0xB6080000
 
 /* MEMORY */
 #define AP325RXA_SDRAM_BASE		(0x88000000)
 #define AP325RXA_FLASH_BASE_1		(0xA0000000)
 #define AP325RXA_FLASH_BANK_SIZE	(128 * 1024 * 1024)
 
+#define CONFIG_SYS_TEXT_BASE	0x8FFC0000
+
 /* undef to save memory	*/
 #define CONFIG_SYS_LONGHELP
 /* Monitor Command Prompt */
@@ -111,7 +114,6 @@
 /* Size of DRAM reserved for malloc() use */
 #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
 /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE	(256)
 #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
 
 /* FLASH */
@@ -137,6 +139,7 @@
 #define CONFIG_SYS_ATA_DATA_OFFSET	0x200	/* data reg offset */
 #define CONFIG_SYS_ATA_REG_OFFSET	0x200	/* reg offset */
 #define CONFIG_SYS_ATA_ALT_OFFSET	0x210	/* alternate register offset */
+#define CONFIG_IDE_SWAP_IO
 
 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
 #define CONFIG_SYS_MAX_FLASH_BANKS	1
@@ -170,7 +173,7 @@
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ	33333333
-#define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ			(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
+#define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_HZ		1000
 
 #endif	/* __AP325RXA_H */