X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fat91rm9200dk.h;h=cd2eae20634fb46350ffb1cb53294b48ae3a2312;hb=acdab5c33f1ea6f5e08f06f08bc64af23ff40d71;hp=951ce160a45f48ff1744123d22b087441cd72fbd;hpb=a1b215e2a2a013327693f2fb990957b746f26cf5;p=u-boot

diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h
index 951ce160a4..cd2eae2063 100644
--- a/include/configs/at91rm9200dk.h
+++ b/include/configs/at91rm9200dk.h
@@ -112,16 +112,11 @@
  */
 #include <config_cmd_default.h>
 
-#define CONFIG_CMD_MII
 #define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NAND
 
-#undef CONFIG_CMD_BDI
-#undef CONFIG_CMD_IMI
-#undef CONFIG_CMD_AUTOSCRIPT
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_MISC
-#undef CONFIG_CMD_LOADS
-
+#define CFG_NAND_LEGACY
 
 #define CFG_MAX_NAND_DEVICE	1	/* Max number of NAND devices		*/
 #define SECTORSIZE 512
@@ -137,6 +132,7 @@
 #define AT91_SMART_MEDIA_ALE (1 << 22)	/* our ALE is AD22 */
 #define AT91_SMART_MEDIA_CLE (1 << 21)	/* our CLE is AD21 */
 
+#include <asm/arch/AT91RM9200.h>	/* needed for port definitions */
 #define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
 #define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)