X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fatngw100.h;h=bda6eedcf2b7b2c1afddb403b4f35cbfee2cf9ed;hb=a5ec7f649427eb618126a3b8d6b2d81f92cf770f;hp=c998952fbf35f1260ef3904344e1e4750be235d5;hpb=aaa0e0812ffdf861993129f41936eb175a2eaa5f;p=u-boot

diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h
index c998952fbf..bda6eedcf2 100644
--- a/include/configs/atngw100.h
+++ b/include/configs/atngw100.h
@@ -24,12 +24,12 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
-#define CONFIG_AVR32			1
-#define CONFIG_AT32AP			1
-#define CONFIG_AT32AP7000		1
-#define CONFIG_ATNGW100			1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_ATNGW100
 
 #define CONFIG_SYS_HZ				1000
 
@@ -38,8 +38,8 @@
  * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
  * and the PBA bus to run at 1/4 the PLL frequency.
  */
-#define CONFIG_PLL			1
-#define CONFIG_SYS_POWER_MANAGER		1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
 #define CONFIG_SYS_OSC0_HZ			20000000
 #define CONFIG_SYS_PLL0_DIV			1
 #define CONFIG_SYS_PLL0_MUL			7
@@ -49,6 +49,9 @@
 #define CONFIG_SYS_CLKDIV_PBA			2
 #define CONFIG_SYS_CLKDIV_PBB			1
 
+/* Reserve VM regions for SDRAM and NOR flash */
+#define CONFIG_SYS_NR_VM_REGIONS		2
+
 /*
  * The PLLOPT register controls the PLL like this:
  *   icp = PLLOPT<2>
@@ -58,14 +61,14 @@
  */
 #define CONFIG_SYS_PLL0_OPT			0x04
 
-#define CONFIG_USART1			1
-
+#define CONFIG_USART_BASE		ATMEL_BASE_USART1
+#define CONFIG_USART_ID			1
 /* User serviceable stuff */
-#define CONFIG_DOS_PARTITION		1
+#define CONFIG_DOS_PARTITION
 
-#define CONFIG_CMDLINE_TAG		1
-#define CONFIG_SETUP_MEMORY_TAGS	1
-#define CONFIG_INITRD_TAG		1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_STACKSIZE		(2048)
 
@@ -80,8 +83,8 @@
  * data on the serial line may interrupt the boot sequence.
  */
 #define CONFIG_BOOTDELAY		1
-#define CONFIG_AUTOBOOT			1
-#define CONFIG_AUTOBOOT_KEYED		1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
 #define CONFIG_AUTOBOOT_PROMPT		\
 	"Press SPACE to abort autoboot in %d seconds\n", bootdelay
 #define CONFIG_AUTOBOOT_DELAY_STR	"d"
@@ -92,8 +95,8 @@
  * should be generated and assigned to the environment variables
  * "ethaddr" and "eth1addr". This is normally done during production.
  */
-#define CONFIG_OVERWRITE_ETHADDR_ONCE	1
-#define CONFIG_NET_MULTI		1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
 
 /*
  * BOOTP/DHCP options
@@ -101,8 +104,6 @@
 #define CONFIG_BOOTP_SUBNETMASK
 #define CONFIG_BOOTP_GATEWAY
 
-#define CONFIG_DOS_PARTITION		1
-
 /*
  * Command line configuration.
  */
@@ -117,30 +118,30 @@
 #define CONFIG_CMD_SF
 #define CONFIG_CMD_SPI
 
-#undef CONFIG_CMD_AUTOSCRIPT
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_SOURCE
 #undef CONFIG_CMD_XIMG
 
-#define CONFIG_ATMEL_USART		1
-#define CONFIG_MACB			1
-#define CONFIG_PORTMUX_PIO		1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
 #define CONFIG_SYS_NR_PIOS			5
-#define CONFIG_SYS_HSDRAMC			1
-#define CONFIG_MMC			1
-#define CONFIG_ATMEL_MCI		1
-#define CONFIG_ATMEL_SPI		1
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
+#define CONFIG_ATMEL_SPI
 
-#define CONFIG_SPI_FLASH		1
-#define CONFIG_SPI_FLASH_ATMEL		1
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_ATMEL
 
 #define CONFIG_SYS_DCACHE_LINESZ		32
 #define CONFIG_SYS_ICACHE_LINESZ		32
 
 #define CONFIG_NR_DRAM_BANKS		1
 
-#define CONFIG_SYS_FLASH_CFI			1
-#define CONFIG_FLASH_CFI_DRIVER		1
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
 
 #define CONFIG_SYS_FLASH_BASE			0x00000000
 #define CONFIG_SYS_FLASH_SIZE			0x800000
@@ -148,12 +149,13 @@
 #define CONFIG_SYS_MAX_FLASH_SECT		135
 
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE		0x00000000
 
 #define CONFIG_SYS_INTRAM_BASE			INTERNAL_SRAM_BASE
 #define CONFIG_SYS_INTRAM_SIZE			INTERNAL_SRAM_SIZE
 #define CONFIG_SYS_SDRAM_BASE			EBI_SDRAM_BASE
 
-#define CONFIG_ENV_IS_IN_FLASH		1
+#define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_SIZE			65536
 #define CONFIG_ENV_ADDR			(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 
@@ -171,7 +173,7 @@
 #define CONFIG_SYS_CBSIZE			256
 #define CONFIG_SYS_MAXARGS			16
 #define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP			1
+#define CONFIG_SYS_LONGHELP
 
 #define CONFIG_SYS_MEMTEST_START		EBI_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END			(CONFIG_SYS_MEMTEST_START + 0x1f00000)