X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fatstk1003.h;h=817d94373e1065674d400e6c14b4a1a0c283ecbf;hb=f3fcf92d595b297b47a1b58b8ec39f93f40ef912;hp=1e80dc856e98dd2d3a86888cbcaefc0e5895ef53;hpb=50bd0057ba8fceeb48533f8b1a652ccd0e170838;p=u-boot

diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h
index 1e80dc856e..817d94373e 100644
--- a/include/configs/atstk1003.h
+++ b/include/configs/atstk1003.h
@@ -24,15 +24,13 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
 
-#define CONFIG_AVR32			1
-#define CONFIG_AT32AP			1
-#define CONFIG_AT32AP7001		1
-#define CONFIG_ATSTK1003		1
-#define CONFIG_ATSTK1000		1
-
-#define CONFIG_ATSTK1000_EXT_FLASH	1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7001
+#define CONFIG_ATSTK1003
+#define CONFIG_ATSTK1000
 
 /*
  * Timer clock frequency. We're using the CPU-internal COUNT register
@@ -46,8 +44,8 @@
  * PLL frequency.
  * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
  */
-#define CONFIG_PLL			1
-#define CONFIG_SYS_POWER_MANAGER		1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
 #define CONFIG_SYS_OSC0_HZ			20000000
 #define CONFIG_SYS_PLL0_DIV			1
 #define CONFIG_SYS_PLL0_MUL			7
@@ -73,6 +71,9 @@
  */
 #define CONFIG_SYS_CLKDIV_PBB			1
 
+/* Reserve VM regions for SDRAM and NOR flash */
+#define CONFIG_SYS_NR_VM_REGIONS		2
+
 /*
  * The PLLOPT register controls the PLL like this:
  *   icp = PLLOPT<2>
@@ -82,17 +83,15 @@
  */
 #define CONFIG_SYS_PLL0_OPT			0x04
 
-#undef CONFIG_USART0
-#define CONFIG_USART1			1
-#undef CONFIG_USART2
-#undef CONFIG_USART3
+#define CONFIG_USART_BASE		ATMEL_BASE_USART1
+#define CONFIG_USART_ID			1
 
 /* User serviceable stuff */
-#define CONFIG_DOS_PARTITION		1
+#define CONFIG_DOS_PARTITION
 
-#define CONFIG_CMDLINE_TAG		1
-#define CONFIG_SETUP_MEMORY_TAGS	1
-#define CONFIG_INITRD_TAG		1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_STACKSIZE		(2048)
 
@@ -101,15 +100,15 @@
 	"console=ttyS0 root=/dev/mmcblk0p1 rootwait"
 
 #define CONFIG_BOOTCOMMAND						\
-	"mmcinit; ext2load mmc 0:1 0x10400000 /boot/uImage; bootm"
+	"mmc rescan; ext2load mmc 0:1 0x10400000 /boot/uImage; bootm"
 
 /*
  * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
  * data on the serial line may interrupt the boot sequence.
  */
 #define CONFIG_BOOTDELAY		1
-#define CONFIG_AUTOBOOT			1
-#define CONFIG_AUTOBOOT_KEYED		1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
 #define CONFIG_AUTOBOOT_PROMPT		\
 	"Press SPACE to abort autoboot in %d seconds\n", bootdelay
 #define CONFIG_AUTOBOOT_DELAY_STR	"d"
@@ -132,22 +131,21 @@
 #undef CONFIG_CMD_SETGETDCR
 #undef CONFIG_CMD_XIMG
 
-#define CONFIG_ATMEL_USART		1
-#define CONFIG_PIO2			1
-#define CONFIG_SYS_HSDRAMC			1
-#define CONFIG_MMC			1
-#define CONFIG_ATMEL_MCI		1
+#define CONFIG_ATMEL_USART
+#define CONFIG_PORTMUX_PIO
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_GENERIC_ATMEL_MCI
+#define CONFIG_GENERIC_MMC
+#define CONFIG_SYS_MMC_MAX_BLK_COUNT 1
 
 #define CONFIG_SYS_DCACHE_LINESZ		32
 #define CONFIG_SYS_ICACHE_LINESZ		32
 
 #define CONFIG_NR_DRAM_BANKS		1
 
-/* External flash on STK1000 */
-#if 0
-#define CONFIG_SYS_FLASH_CFI			1
-#define CONFIG_FLASH_CFI_DRIVER		1
-#endif
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
 
 #define CONFIG_SYS_FLASH_BASE			0x00000000
 #define CONFIG_SYS_FLASH_SIZE			0x800000
@@ -155,12 +153,13 @@
 #define CONFIG_SYS_MAX_FLASH_SECT		135
 
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE		0x00000000
 
 #define CONFIG_SYS_INTRAM_BASE			INTERNAL_SRAM_BASE
 #define CONFIG_SYS_INTRAM_SIZE			INTERNAL_SRAM_SIZE
 #define CONFIG_SYS_SDRAM_BASE			EBI_SDRAM_BASE
 
-#define CONFIG_ENV_IS_IN_FLASH		1
+#define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_SIZE			65536
 #define CONFIG_ENV_ADDR			(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
 
@@ -177,7 +176,7 @@
 #define CONFIG_SYS_CBSIZE			256
 #define CONFIG_SYS_MAXARGS			16
 #define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP			1
+#define CONFIG_SYS_LONGHELP
 
 #define CONFIG_SYS_MEMTEST_START		EBI_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END			(CONFIG_SYS_MEMTEST_START + 0x700000)