X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fballoon3.h;h=12c5a6cd15436e7ed3232996ba074767535b3202;hb=4a41cc157870cf752795adef811fa7ca9cb1b974;hp=ae60f2eb3c17f0a49f18e821f51ee446c4bb3e42;hpb=20ae5193e325ad005ca9e15377838e0763069658;p=u-boot

diff --git a/include/configs/balloon3.h b/include/configs/balloon3.h
index ae60f2eb3c..12c5a6cd15 100644
--- a/include/configs/balloon3.h
+++ b/include/configs/balloon3.h
@@ -3,20 +3,7 @@
  *
  * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef	__CONFIG_H
@@ -25,15 +12,14 @@
 /*
  * High Level Board Configuration Options
  */
-#define	CONFIG_PXA27X		1	/* Marvell PXA270 CPU */
-#define	CONFIG_BALLOON3		1	/* Balloon3 board */
+#define	CONFIG_CPU_PXA27X		1	/* Marvell PXA270 CPU */
+#define	CONFIG_BALLOON3			1	/* Balloon3 board */
 
 /*
  * Environment settings
  */
 #define	CONFIG_ENV_OVERWRITE
 #define	CONFIG_SYS_MALLOC_LEN		(128*1024)
-#define	CONFIG_SYS_GBL_DATA_SIZE	128
 #define	CONFIG_ARCH_CPU_INIT
 #define	CONFIG_BOOTCOMMAND						\
 	"fpga load 0x0 0x50000 0x62638; "				\
@@ -54,19 +40,15 @@
  */
 #define	CONFIG_PXA_SERIAL
 #define	CONFIG_STUART			1
+#define CONFIG_CONS_INDEX		2
 #define	CONFIG_BAUDRATE			115200
-#define	CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 
 /*
  * Bootloader Components Configuration
  */
-#include <config_cmd_default.h>
-
-#undef	CONFIG_CMD_NET
 #undef	CONFIG_CMD_ENV
-#undef	CONFIG_CMD_IMLS
 #define	CONFIG_CMD_USB
-#define	CONFIG_CMD_FPGA
+#define	CONFIG_CMD_FPGA_LOADMK
 #undef	CONFIG_LCD
 
 /*
@@ -74,20 +56,17 @@
  */
 #ifdef	CONFIG_CMD_KGDB
 #define	CONFIG_KGDB_BAUDRATE		230400	/* kgdb serial port speed */
-#define	CONFIG_KGDB_SER_INDEX		2	/* which serial port to use */
 #endif
 
 /*
  * HUSH Shell Configuration
  */
 #define	CONFIG_SYS_HUSH_PARSER		1
-#define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
 
 #define	CONFIG_SYS_LONGHELP
 #ifdef	CONFIG_SYS_HUSH_PARSER
 #define	CONFIG_SYS_PROMPT		"$ "
 #else
-#define	CONFIG_SYS_PROMPT		"=> "
 #endif
 #define	CONFIG_SYS_CBSIZE		256
 #define	CONFIG_SYS_PBSIZE		\
@@ -99,28 +78,17 @@
 /*
  * Clock Configuration
  */
-#undef	CONFIG_SYS_CLKS_IN_HZ
-#define	CONFIG_SYS_HZ			3250000		/* Timer @ 3250000 Hz */
 #define	CONFIG_SYS_CPUSPEED		0x290		/* 520MHz */
 
-/*
- * Stack sizes
- */
-#define	CONFIG_STACKSIZE		(128*1024)	/* regular stack */
-#ifdef	CONFIG_USE_IRQ
-#define	CONFIG_STACKSIZE_IRQ		(4*1024)	/* IRQ stack */
-#define	CONFIG_STACKSIZE_FIQ		(4*1024)	/* FIQ stack */
-#endif
-
 /*
  * DRAM Map
  */
-#define	CONFIG_NR_DRAM_BANKS		3		/* 2 banks of DRAM */
+#define	CONFIG_NR_DRAM_BANKS		3		/* 3 banks of DRAM */
 #define	PHYS_SDRAM_1			0xa0000000	/* SDRAM Bank #1 */
 #define	PHYS_SDRAM_1_SIZE		0x08000000	/* 128 MB */
 #define	PHYS_SDRAM_2			0xb0000000	/* SDRAM Bank #2 */
 #define	PHYS_SDRAM_2_SIZE		0x08000000	/* 128 MB */
-#define	PHYS_SDRAM_3			0x80000000	/* SDRAM Bank #2 */
+#define	PHYS_SDRAM_3			0x80000000	/* SDRAM Bank #3 */
 #define	PHYS_SDRAM_3_SIZE		0x08000000	/* 128 MB */
 
 #define	CONFIG_SYS_DRAM_BASE		0xa0000000	/* CS0 */
@@ -133,7 +101,7 @@
 
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
 #define	CONFIG_SYS_INIT_SP_ADDR		\
-	(PHYS_SDRAM_1 + CONFIG_SYS_GBL_DATA_SIZE + 2048)
+	(PHYS_SDRAM_1 + GENERATED_GBL_DATA_SIZE + 2048)
 
 /*
  * NOR FLASH
@@ -152,15 +120,15 @@
 
 #define	CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
 
-#define	CONFIG_SYS_FLASH_ERASE_TOUT	(2*CONFIG_SYS_HZ)
-#define	CONFIG_SYS_FLASH_WRITE_TOUT	(2*CONFIG_SYS_HZ)
-#define	CONFIG_SYS_FLASH_LOCK_TOUT	(2*CONFIG_SYS_HZ)
-#define	CONFIG_SYS_FLASH_UNLOCK_TOUT	(2*CONFIG_SYS_HZ)
+#define	CONFIG_SYS_FLASH_ERASE_TOUT	240000
+#define	CONFIG_SYS_FLASH_WRITE_TOUT	240000
+#define	CONFIG_SYS_FLASH_LOCK_TOUT	240000
+#define	CONFIG_SYS_FLASH_UNLOCK_TOUT	240000
 #define	CONFIG_SYS_FLASH_PROTECTION
 #define	CONFIG_ENV_IS_IN_FLASH
 #else
 #define	CONFIG_SYS_NO_FLASH
-#define	CONFIG_SYS_ENV_IS_NOWHERE
+#define	CONFIG_ENV_IS_NOWHERE
 #endif
 
 #define	CONFIG_SYS_MONITOR_BASE		0x000000
@@ -216,7 +184,6 @@
 #define	CONFIG_SYS_MDMRS_VAL	0x00220022
 #define	CONFIG_SYS_FLYCNFG_VAL	0x00000000
 #define	CONFIG_SYS_SXCNFG_VAL	0x00000000
-#define	CONFIG_SYS_MEM_BUF_IMP	0x0f
 
 /*
  * PCMCIA and CF Interfaces