X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fbf561-acvilon.h;h=ee585c0ffdeabe5a66cbaccc1bf37188e580622b;hb=962d026b6aaf7d801d182f3188e4bbc106e057e3;hp=0be170c3ee8ed41e7e6e2ba8883aa7d684195c48;hpb=b097d552bc9ee0351bb0c3d1219856e845df59f9;p=u-boot

diff --git a/include/configs/bf561-acvilon.h b/include/configs/bf561-acvilon.h
index 0be170c3ee..ee585c0ffd 100644
--- a/include/configs/bf561-acvilon.h
+++ b/include/configs/bf561-acvilon.h
@@ -12,8 +12,8 @@
 /*
  * Processor Settings
  */
-#define CONFIG_BFIN_CPU				bf561-0.5
-#define CONFIG_BFIN_BOOT_MODE		BFIN_BOOT_BYPASS
+#define CONFIG_BFIN_CPU             bf561-0.5
+#define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_BYPASS
 
 
 /*
@@ -76,7 +76,6 @@
  * Network Settings
  */
 #define ADI_CMDS_NETWORK			1
-#define CONFIG_NET_MULTI
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_DATE
@@ -131,7 +130,6 @@
 #define CONFIG_ENV_SECT_SIZE		(1056 * 8)
 #define CONFIG_ENV_OFFSET			((16 + 256) * 1056)
 #define CONFIG_ENV_SIZE				(8 * 1056)
-#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 
 
 /*
@@ -145,7 +143,6 @@
 
 #define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))
 #define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 3))
-#define BFIN_NAND_READY     PF10
 #define BFIN_NAND_WRITE(addr, cmd) \
 	do { \
 		bfin_write8(addr, cmd); \
@@ -154,12 +151,7 @@
 
 #define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
 #define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
-#define NAND_PLAT_DEV_READY(chip)      (bfin_read_FIO0_FLAG_D() & BFIN_NAND_READY)
-#define NAND_PLAT_INIT() \
-	do { \
-		bfin_write_FIO0_DIR(bfin_read_FIO0_DIR() & ~BFIN_NAND_READY); \
-		bfin_write_FIO0_INEN(bfin_read_FIO0_INEN() | BFIN_NAND_READY); \
-	} while (0)
+#define NAND_PLAT_GPIO_DEV_READY       GPIO_PF10
 
 
 /*