X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fblackstamp.h;h=7de425349fb46be5b00ffb9f1bd590f49d423f13;hb=a43febde4452f254621c0c95d452c89ad498e959;hp=3f5c95917d00f3cb413106bcc25a331ff15c13f2;hpb=d6288664743cdd4824cb877ca424619c827c1256;p=u-boot diff --git a/include/configs/blackstamp.h b/include/configs/blackstamp.h index 3f5c95917d..7de425349f 100644 --- a/include/configs/blackstamp.h +++ b/include/configs/blackstamp.h @@ -24,12 +24,12 @@ /* CPU Options * Be sure to set the Silicon Revision Correctly */ +#define CONFIG_BFIN_CPU bf532-0.5 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER /* * Board settings */ -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20300300 @@ -40,7 +40,6 @@ #define SHARED_RESOURCES 1 /* Is I2C bit-banged? */ -#undef CONFIG_SOFT_I2 /* * Clock Settings @@ -75,7 +74,7 @@ #define CONFIG_GATEWAYIP 192.168.0.1 #define CONFIG_SERVERIP 192.168.0.2 #define CONFIG_HOSTNAME blackstamp -#define CONFIG_ROOTPATH /checkout/uClinux-dist/romfs +#define CONFIG_ROOTPATH "/checkout/uClinux-dist/romfs" #define CONFIG_SYS_AUTOLOAD "no" /* To remove hardcoding and enable MAC storage in EEPROM */ @@ -115,7 +114,7 @@ # undef CONFIG_CMD_NET #endif -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT # define CONFIG_CMD_I2C #endif @@ -130,12 +129,12 @@ #define CONFIG_BOOTCOMMAND "run ramboot" #define CONFIG_BOOTARGS \ "root=/dev/mtdblock0 rw " \ - "clkin_hz=" MK_STR(CONFIG_CLKIN_HZ) " " \ + "clkin_hz=" __stringify(CONFIG_CLKIN_HZ) " " \ "earlyprintk=" \ "serial," \ - "uart" MK_STR(CONFIG_UART_CONSOLE) "," \ - MK_STR(CONFIG_BAUDRATE) " " \ - "console=ttyBF0," MK_STR(CONFIG_BAUDRATE) + "uart" __stringify(CONFIG_UART_CONSOLE) "," \ + __stringify(CONFIG_BAUDRATE) " " \ + "console=ttyBF0," __stringify(CONFIG_BAUDRATE) #if defined(CONFIG_CMD_NET) # if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) @@ -149,7 +148,7 @@ "eeprom write $(loadaddr) 0x0 $(filesize)" # else # define UBOOT_ENV_UPDATE \ - "sf probe " MK_STR(BFIN_BOOT_SPI_SSEL) ";" \ + "sf probe " __stringify(BFIN_BOOT_SPI_SSEL) ";" \ "sf erase 0 0x40000;" \ "sf write $(loadaddr) 0 $(filesize)" # endif @@ -196,6 +195,7 @@ #define CONFIG_BAUDRATE 57600 #define CONFIG_LOADS_ECHO 1 #define CONFIG_UART_CONSOLE 0 +#define CONFIG_BFIN_SERIAL /* * I2C settings @@ -204,11 +204,11 @@ * Note these pins are arbitrarily chosen because we aren't using * them yet. You can (and probably should) change these values! */ -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF9 #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF8 -#define CONFIG_SYS_I2C_SPEED 50000 -#define CONFIG_SYS_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE #endif /*