X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fcanmb.h;h=b41666064cf898d97f049cf4f3ae384e485bd680;hb=3bac8303e4840f6902a51f9665696ff3939596f4;hp=ff7b6e5ca1af7d649e8eb23a19e23f833f331d2a;hpb=f61f1e150c84f5b9347fca79a4bc5f2286c545d2;p=u-boot diff --git a/include/configs/canmb.h b/include/configs/canmb.h index ff7b6e5ca1..b41666064c 100644 --- a/include/configs/canmb.h +++ b/include/configs/canmb.h @@ -2,23 +2,7 @@ * (C) Copyright 2005 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -29,14 +13,18 @@ * (easy to change) */ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* More exactly a MPC5200 */ +#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */ #define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */ +#define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ +/* + * allowed and functional CONFIG_SYS_TEXT_BASE values: + * 0xfe000000 low boot at 0x00000100 (default board setting) + * 0x00100000 RAM load and test + */ +#define CONFIG_SYS_TEXT_BASE 0xFE000000 -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define CONFIG_BOARD_EARLY_INIT_R @@ -49,7 +37,6 @@ #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } - /* * BOOTP options */ @@ -58,36 +45,26 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME - /* * Command line configuration. */ -#include - -#define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE -#define CONFIG_CMD_DHCP #define CONFIG_CMD_IMMAP -#define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_SNTP - /* * MUST be low boot - HIGHBOOT is not supported anymore */ -#if (TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */ +#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */ # define CONFIG_SYS_LOWBOOT 1 # define CONFIG_SYS_LOWBOOT16 1 #else -# error "TEXT_BASE must be 0xFE000000" +# error "CONFIG_SYS_TEXT_BASE must be 0xFE000000" #endif /* * Autobooting */ -#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #define CONFIG_PREBOOT "echo;" \ "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ @@ -153,14 +130,12 @@ /* Use SRAM until RAM will be available */ #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM -#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */ - +#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) # define CONFIG_SYS_RAMBOOT 1 #endif @@ -173,6 +148,7 @@ * Ethernet configuration */ #define CONFIG_MPC5xxx_FEC 1 +#define CONFIG_MPC5xxx_FEC_MII100 #define CONFIG_PHY_ADDR 0x0 /* * GPIO configuration: @@ -186,7 +162,6 @@ * Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #if defined(CONFIG_CMD_KGDB) # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #else @@ -201,8 +176,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ - #define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */ #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */