X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fcm_t335.h;h=a1b8e141a9ef032989d75c16bd999bf4caece3a3;hb=2be296538e2e9d2893dc495b3fc8f9f6acb1454c;hp=fbdead27946809cbf4b60869c1ced8a98bf53a12;hpb=e8ac22be6a6a8544f43ae58d9ef33574a51b5971;p=u-boot

diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h
index fbdead2794..a1b8e141a9 100644
--- a/include/configs/cm_t335.h
+++ b/include/configs/cm_t335.h
@@ -16,23 +16,14 @@
 
 #include <configs/ti_am335x_common.h>
 
-#undef CONFIG_BOARD_LATE_INIT
 #undef CONFIG_SPI
 #undef CONFIG_OMAP3_SPI
-#undef CONFIG_CMD_SPI
-#undef CONFIG_SPL_OS_BOOT
 #undef CONFIG_BOOTCOUNT_LIMIT
 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
 
 #undef CONFIG_MAX_RAM_BANK_SIZE
 #define CONFIG_MAX_RAM_BANK_SIZE	(512 << 20)	/* 512MB */
 
-#undef CONFIG_SYS_PROMPT
-#define CONFIG_SYS_PROMPT		"CM-T335 # "
-
-#define CONFIG_OMAP_COMMON
-
-#define MACH_TYPE_CM_T335		4586	/* Until the next sync */
 #define CONFIG_MACH_TYPE		MACH_TYPE_CM_T335
 
 /* Clock Defines */
@@ -67,7 +58,6 @@
 		"nboot ${loadaddr} nand0 900000; " \
 		"bootm ${loadaddr}\0"
 
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"loadaddr=82000000\0" \
 	"console=ttyO0,115200n8\0" \
@@ -102,19 +92,18 @@
 /* NS16550 Configuration */
 #define CONFIG_SYS_NS16550_COM1		0x44e09000	/* UART0 */
 #define CONFIG_SYS_NS16550_COM2		0x48022000	/* UART1 */
-#define CONFIG_BAUDRATE			115200
 
 /* I2C Configuration */
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
+#define CONFIG_SYS_I2C_EEPROM_BUS	0
 
 /* SPL */
-#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/am33xx/u-boot-spl.lds"
+#define CONFIG_SPL_LDSCRIPT		"arch/arm/mach-omap2/u-boot-spl.lds"
 
 /* Network. */
 #define CONFIG_PHY_GIGE
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR			0
 #define CONFIG_PHY_ATHEROS
 
 /* NAND support */
@@ -142,29 +131,44 @@
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x200000
 
 #define CONFIG_CMD_NAND
-#define GPMC_NAND_ECC_LP_x8_LAYOUT
 #define MTDIDS_DEFAULT			"nand0=nand"
 #define MTDPARTS_DEFAULT		"mtdparts=nand:2m(spl)," \
 					"1m(u-boot),1m(u-boot-env)," \
 					"1m(dtb),4m(splash)," \
 					"6m(kernel),-(rootfs)"
-#define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET		0x300000 /* environment starts here */
 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
 #define CONFIG_SYS_NAND_ONFI_DETECTION
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_CMD_SPL_NAND_OFS		0x400000 /* un-assigned: (using dtb) */
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x500000
+#define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
+#endif
 
 /* GPIO pin + bank to pin ID mapping */
 #define GPIO_PIN(_bank, _pin)		((_bank << 5) + _pin)
 
 /* Status LED */
-#define CONFIG_STATUS_LED
-#define CONFIG_GPIO_LED
-#define CONFIG_BOARD_SPECIFIC_LED
-#define STATUS_LED_BIT			GPIO_PIN(2, 0)
 /* Status LED polarity is inversed, so init it in the "off" state */
-#define STATUS_LED_STATE		STATUS_LED_OFF
-#define STATUS_LED_PERIOD		(CONFIG_SYS_HZ / 2)
-#define STATUS_LED_BOOT			0
+
+/* EEPROM */
+#define CONFIG_ENV_EEPROM_IS_ON_I2C
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
+#define CONFIG_SYS_EEPROM_SIZE			256
+
+#ifndef CONFIG_SPL_BUILD
+/*
+ * Enable PCA9555 at I2C0-0x26.
+ * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command.
+ */
+#define CONFIG_PCA953X
+#define CONFIG_CMD_PCA953X
+#define CONFIG_CMD_PCA953X_INFO
+#define CONFIG_SYS_I2C_PCA953X_ADDR	0x26
+#define CONFIG_SYS_I2C_PCA953X_WIDTH	{ {0x26, 16} }
+#endif /* CONFIG_SPL_BUILD */
 
 #endif	/* __CONFIG_CM_T335_H */