X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fcsb272.h;h=f21fa648b10ffc02895cc9d4bff6793c3e87021d;hb=833b6435de3e8cf5b06ba81cb1b2b50e044269ff;hp=5d3b09aa3c2df06e6d55796231acb999d96095cc;hpb=ee924e00300bd1136589b2d5f8ad1f008df01bd4;p=u-boot diff --git a/include/configs/csb272.h b/include/configs/csb272.h index 5d3b09aa3c..f21fa648b1 100644 --- a/include/configs/csb272.h +++ b/include/configs/csb272.h @@ -40,6 +40,8 @@ #define CONFIG_LAST_STAGE_INIT 1 /* Call last_stage_init() */ #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ +#define CONFIG_SYS_TEXT_BASE 0xFFFC0000 + /* * OS Bootstrap configuration * @@ -121,9 +123,6 @@ * */ #undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#ifdef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* hush shell secondary prompt */ -#endif #define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ @@ -140,7 +139,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ -#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */ #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_info (bd_t) */ #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ @@ -161,6 +159,12 @@ * UART configuration * */ +#define CONFIG_CONS_INDEX 1 /* Use UART0 */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK get_serial_clock() + #define CONFIG_SYS_EXT_SERIAL_CLOCK 3868400 /* use external serial clock */ #undef CONFIG_SYS_BASE_BAUD #define CONFIG_BAUDRATE 38400 /* Default baud rate */ @@ -172,6 +176,7 @@ * */ #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ +#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */ #define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ @@ -244,7 +249,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xFE000000 #define CONFIG_SYS_FLASH_SIZE 0x02000000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 KB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 KB for malloc() */ @@ -284,9 +289,8 @@ * */ #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of on-chip SRAM */ -#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* byte size reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* @@ -296,13 +300,4 @@ #define CONFIG_SYS_I2C_PLL_ADDR 0x58 /* I2C address of AMIS FS6377-01 PLL */ #define CONFIG_I2CFAST 1 /* enable "i2cfast" env. setting */ -/* - * Internal Definitions - * - * Boot Flags - * - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */