X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fda830evm.h;h=c4cc62ecb41661883f52057228872d3aea4bf885;hb=aafd2c5ddb9078c425c2edb8a6b5f5017895bea3;hp=1feada926321272f1206cf40dba86496ff147b79;hpb=d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0;p=u-boot diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h index 1feada9263..c4cc62ecb4 100644 --- a/include/configs/da830evm.h +++ b/include/configs/da830evm.h @@ -5,20 +5,7 @@ * * Copyright (C) 2007 Sergey Kubushyn * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -28,6 +15,7 @@ * Board */ #define CONFIG_DRIVER_TI_EMAC +#define CONFIG_USE_SPIFLASH /* * SoC Configuration @@ -35,11 +23,11 @@ #define CONFIG_MACH_DAVINCI_DA830_EVM #define CONFIG_ARM926EJS /* arm926ejs CPU core */ #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ +#define CONFIG_SOC_DA830 /* TI DA830 SoC */ #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) -#define CONFIG_SYS_HZ 1000 #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_TEXT_BASE 0xc1080000 @@ -47,12 +35,11 @@ * Memory Info */ #define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ -#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ -#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* memtest start addr */ -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024) /* 16MB test */ +#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Start */ +#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ + (32 << 20)) #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256*1024) /* regular stack */ /* * Serial Driver info @@ -64,7 +51,6 @@ #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ #define CONFIG_BAUDRATE 115200 /* Default baud rate */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* * I2C Configuration @@ -86,14 +72,11 @@ * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 1 #define CONFIG_MII -#define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_NET_MULTI #endif /* @@ -105,17 +88,16 @@ #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_OFFSET (512 << 10) -#define CONFIG_ENV_SIZE (512 << 10) +#define CONFIG_ENV_SIZE (10 << 10) /* 10KB */ +#define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST +#define CONFIG_SYS_NAND_PAGE_2K #define CONFIG_SYS_NAND_CS 3 #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CONFIG_SYS_NAND_PAGE_2K -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ -#define CONFIG_SYS_CLE_MASK 0x10 -#define CONFIG_SYS_ALE_MASK 0x8 +#define CONFIG_SYS_NAND_MASK_CLE 0x10 +#define CONFIG_SYS_NAND_MASK_ALE 0x8 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 -#define DEF_BOOTM "" #endif #ifdef CONFIG_USE_NOR @@ -147,8 +129,8 @@ #define CONFIG_DAVINCI_SPI #define CONFIG_SYS_SPI_BASE DAVINCI_SPI0_BASE #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) -#define CONFIG_SF_DEFAULT_SPEED 50000000 -#define CONFIG_SYS_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#define CONFIG_SF_DEFAULT_SPEED 30000000 +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED #endif /* @@ -160,20 +142,18 @@ /* * U-Boot general configuration */ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #undef CONFIG_MISC_INIT_R #undef CONFIG_BOOTDELAY #define CONFIG_BOOTFILE "uImage" /* Boot file name */ -#define CONFIG_SYS_PROMPT "DA830-evm > " /* Command Prompt */ +#define CONFIG_SYS_PROMPT "U-Boot > " /* Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_MEMTEST_START + 0x700000) +#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) #define CONFIG_VERSION_VARIABLE #define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP #define CONFIG_CRC32_VERIFY @@ -182,7 +162,7 @@ /* * Linux Information */ -#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100) +#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_BOOTARGS "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock/2 rw noinitrd ip=dhcp" @@ -203,7 +183,10 @@ #define CONFIG_CMD_MEMORY #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR -#define CONFIG_CMD_EEPROM + +#ifdef CONFIG_CMD_BDI +#define CONFIG_CLOCKS +#endif #ifndef CONFIG_DRIVER_TI_EMAC #undef CONFIG_CMD_NET @@ -225,9 +208,32 @@ #undef CONFIG_CMD_IMLS #undef CONFIG_CMD_FLASH #define CONFIG_CMD_SPI +#define CONFIG_CMD_SF #define CONFIG_CMD_SAVEENV #endif +/* SD/MMC configuration */ +#ifndef CONFIG_USE_NAND +#define CONFIG_MMC +#define CONFIG_DAVINCI_MMC_SD1 +#define CONFIG_GENERIC_MMC +#define CONFIG_DAVINCI_MMC +#endif + +/* + * Enable MMC commands only when + * MMC support is present + */ +#if defined(CONFIG_MMC) || defined(CONFIG_USB_DA8XX) +#define CONFIG_DOS_PARTITION /* include support for FAT/storage */ +#define CONFIG_CMD_FAT /* include support for FAT cmd */ +#endif + +#ifdef CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_CMD_EXT2 +#endif + #if !defined(CONFIG_USE_NAND) && \ !defined(CONFIG_USE_NOR) && \ !defined(CONFIG_USE_SPIFLASH) @@ -246,8 +252,6 @@ #define CONFIG_USB_STORAGE /* MSC class support */ #define CONFIG_CMD_STORAGE /* inclue support for usb-storage cmd */ -#define CONFIG_CMD_FAT /* inclue support for FAT/storage */ -#define CONFIG_DOS_PARTITION /* inclue support for FAT/storage */ #ifdef CONFIG_USB_KEYBOARD /* HID class support */ #define CONFIG_SYS_USB_EVENT_POLL @@ -280,4 +284,11 @@ "mtdparts=davinci_nand.1:" PART_BOOT PART_PARAMS PART_KERNEL PART_REST #endif +#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ + +/* additions for new relocation code, must be added to all boards */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */