X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fda850evm.h;h=bbb5a9b160b461a35c1e4cff91cd4cca522ed3cf;hb=810c44274980d8bb9fa0d81d091a374adbae8309;hp=11f2869613d53120bb43801f3f65294614afdb90;hpb=25ddd1fb0a2281b182529afbc8fda5de2dc16d96;p=u-boot diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 11f2869613..bbb5a9b160 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -27,6 +27,7 @@ * Board */ #define CONFIG_DRIVER_TI_EMAC +#define CONFIG_USE_SPIFLASH /* * SoC Configuration @@ -40,6 +41,7 @@ #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) #define CONFIG_SYS_HZ 1000 #define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_TEXT_BASE 0xc1080000 /* * Memory Info @@ -70,6 +72,15 @@ #define CONFIG_BAUDRATE 115200 /* Default baud rate */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_SPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_DAVINCI_SPI +#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE +#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) +#define CONFIG_SF_DEFAULT_SPEED 30000000 +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED + /* * I2C Configuration */ @@ -77,6 +88,7 @@ #define CONFIG_DRIVER_DAVINCI_I2C #define CONFIG_SYS_I2C_SPEED 25000 #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ +#define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20 /* * Flash & Environment @@ -98,7 +110,6 @@ #undef CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define NAND_MAX_CHIPS 1 -#define DEF_BOOTM "" #endif /* @@ -115,6 +126,16 @@ #define CONFIG_NET_MULTI #endif +#ifdef CONFIG_USE_SPIFLASH +#undef CONFIG_ENV_IS_IN_FLASH +#undef CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SIZE (64 << 10) +#define CONFIG_ENV_OFFSET (256 << 10) +#define CONFIG_ENV_SECT_SIZE (64 << 10) +#define CONFIG_SYS_NO_FLASH +#endif + /* * U-Boot general configuration */ @@ -139,6 +160,7 @@ */ #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) #define CONFIG_CMDLINE_TAG +#define CONFIG_REVISION_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_BOOTARGS \ "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp" @@ -178,6 +200,14 @@ #define CONFIG_CMD_UBIFS #endif +#ifdef CONFIG_USE_SPIFLASH +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_FLASH +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_CMD_SAVEENV +#endif + #if !defined(CONFIG_USE_NAND) && \ !defined(CONFIG_USE_NOR) && \ !defined(CONFIG_USE_SPIFLASH)