X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fda850evm.h;h=e6adb1fe5115ea9a7f26f7199f361d424b841c1e;hb=f3fcf92d595b297b47a1b58b8ec39f93f40ef912;hp=9c924896b3c97a16d5d60c802f970f91076267af;hpb=cf2c24e3996e49a26b449ab7daf843856b35b5c8;p=u-boot diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 9c924896b3..e6adb1fe51 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -36,16 +36,16 @@ #define CONFIG_MACH_DAVINCI_DA850_EVM #define CONFIG_ARM926EJS /* arm926ejs CPU core */ #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ +#define CONFIG_SOC_DA850 /* TI DA850 SoC */ +#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) #define CONFIG_SYS_HZ 1000 -#define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_TEXT_BASE 0xc1080000 -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF -#define CONFIG_SYS_L2CACHE_OFF +#define CONFIG_SYS_DA850_PLL_INIT +#define CONFIG_SYS_DA850_DDR_INIT /* * Memory Info @@ -64,6 +64,75 @@ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define CONFIG_STACKSIZE (256*1024) /* regular stack */ +#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ + DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ + DAVINCI_SYSCFG_SUSPSRC_SPI1 | \ + DAVINCI_SYSCFG_SUSPSRC_UART2 | \ + DAVINCI_SYSCFG_SUSPSRC_EMAC | \ + DAVINCI_SYSCFG_SUSPSRC_I2C) + +/* + * PLL configuration + */ +#define CONFIG_SYS_DV_CLKMODE 0 +#define CONFIG_SYS_DA850_PLL0_POSTDIV 1 +#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000 +#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001 +#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002 +#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003 +#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002 +#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1 +#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005 + +#define CONFIG_SYS_DA850_PLL1_POSTDIV 1 +#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000 +#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001 +#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002 + +#define CONFIG_SYS_DA850_PLL0_PLLM 24 +#define CONFIG_SYS_DA850_PLL1_PLLM 21 + +/* + * DDR2 memory configuration + */ +#define CONFIG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \ + DV_DDR_PHY_EXT_STRBEN | \ + (0x4 << DV_DDR_PHY_RD_LATENCY_SHIFT)) + +#define CONFIG_SYS_DA850_DDR2_SDBCR ( \ + (1 << DV_DDR_SDCR_MSDRAMEN_SHIFT) | \ + (1 << DV_DDR_SDCR_DDREN_SHIFT) | \ + (1 << DV_DDR_SDCR_SDRAMEN_SHIFT) | \ + (1 << DV_DDR_SDCR_BUS_WIDTH_SHIFT) | \ + (0x3 << DV_DDR_SDCR_CL_SHIFT) | \ + (0x2 << DV_DDR_SDCR_IBANK_SHIFT) | \ + (0x2 << DV_DDR_SDCR_PAGESIZE_SHIFT)) + +/* SDBCR2 is only used if IBANK_POS bit in SDBCR is set */ +#define CONFIG_SYS_DA850_DDR2_SDBCR2 0 + +#define CONFIG_SYS_DA850_DDR2_SDTIMR ( \ + (14 << DV_DDR_SDTMR1_RFC_SHIFT) | \ + (2 << DV_DDR_SDTMR1_RP_SHIFT) | \ + (2 << DV_DDR_SDTMR1_RCD_SHIFT) | \ + (1 << DV_DDR_SDTMR1_WR_SHIFT) | \ + (5 << DV_DDR_SDTMR1_RAS_SHIFT) | \ + (8 << DV_DDR_SDTMR1_RC_SHIFT) | \ + (1 << DV_DDR_SDTMR1_RRD_SHIFT) | \ + (0 << DV_DDR_SDTMR1_WTR_SHIFT)) + +#define CONFIG_SYS_DA850_DDR2_SDTIMR2 ( \ + (7 << DV_DDR_SDTMR2_RASMAX_SHIFT) | \ + (0 << DV_DDR_SDTMR2_XP_SHIFT) | \ + (0 << DV_DDR_SDTMR2_ODT_SHIFT) | \ + (17 << DV_DDR_SDTMR2_XSNR_SHIFT) | \ + (199 << DV_DDR_SDTMR2_XSRD_SHIFT) | \ + (0 << DV_DDR_SDTMR2_RTP_SHIFT) | \ + (0 << DV_DDR_SDTMR2_CKE_SHIFT)) + +#define CONFIG_SYS_DA850_DDR2_SDRCR 0x00000494 +#define CONFIG_SYS_DA850_DDR2_PBBPR 0x30 + /* * Serial Driver info */ @@ -74,11 +143,11 @@ #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ #define CONFIG_BAUDRATE 115200 /* Default baud rate */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #define CONFIG_SPI #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_WINBOND #define CONFIG_DAVINCI_SPI #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) @@ -113,21 +182,18 @@ #define CONFIG_SYS_ALE_MASK 0x8 #undef CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 #endif /* * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 0 #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_NET_MULTI #endif #ifdef CONFIG_USE_NOR @@ -160,6 +226,7 @@ * U-Boot general configuration */ #define CONFIG_MISC_INIT_R +#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_PROMPT "U-Boot > " /* Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ @@ -170,7 +237,6 @@ #define CONFIG_VERSION_VARIABLE #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP #define CONFIG_CRC32_VERIFY @@ -202,6 +268,10 @@ #define CONFIG_CMD_SAVES #define CONFIG_CMD_MEMORY +#ifdef CONFIG_CMD_BDI +#define CONFIG_CLOCKS +#endif + #ifndef CONFIG_DRIVER_TI_EMAC #undef CONFIG_CMD_NET #undef CONFIG_CMD_DHCP @@ -241,6 +311,23 @@ #undef CONFIG_CMD_ENV #endif +/* defines for SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-da850evm.lds" +#define CONFIG_SPL_STACK 0x8001ff00 +#define CONFIG_SPL_TEXT_BASE 0x80000000 +#define CONFIG_SPL_MAX_SIZE 32768 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 +#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000 + /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \