X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fdavinci_dvevm.h;h=ab9cedd077319f6b024874f9de45a81ba7c25204;hb=abbab70363dcdb270cbf24d47849214dd3a3e010;hp=b43beaa03e8c9b5fcf5cc96b34c3d35189a26e13;hpb=dfc91c33957c95da34e3888dc87912d5c15a7603;p=u-boot diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index b43beaa03e..ab9cedd077 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -19,7 +19,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include /* * Define this to make U-Boot skip low level initialization when loaded @@ -51,15 +50,15 @@ /*=======*/ #define DV_EVM #define CONFIG_SYS_NAND_SMALLPAGE -#define CONFIG_SYS_USE_NOR +#define CONFIG_SYS_USE_NAND /*===================*/ /* SoC Configuration */ /*===================*/ #define CONFIG_ARM926EJS /* arm926ejs CPU core */ -#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */ #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ #define CONFIG_SYS_HZ 1000 +#define CONFIG_SOC_DM644X /*====================================================*/ /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ /* on Sonata/DV_EVM board. No EEPROM on schmoogie. */ @@ -72,25 +71,23 @@ /* Memory Info */ /*=============*/ #define CONFIG_SYS_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */ #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */ #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256*1024) /* regular stack */ #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE 0x10000000 /* DDR size 256MB */ + #define DDR_8BANKS /* 8-bank DDR2 (256MB) */ /*====================*/ /* Serial Driver info */ /*====================*/ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 4 /* NS16550 register size */ +#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */ #define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */ -#define CONFIG_SYS_NS16550_CLK 27000000 /* Input clock to NS16550 */ +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */ #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ #define CONFIG_BAUDRATE 115200 /* Default baud rate */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /*===================*/ /* I2C Configuration */ /*===================*/ @@ -113,30 +110,35 @@ /*=====================*/ #ifdef CONFIG_SYS_USE_NAND #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #ifdef CONFIG_SYS_NAND_SMALLPAGE #define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */ -#define CONFIG_ENV_SIZE SZ_16K +#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE +#define CONFIG_CMD_MTDPARTS +#define MTDIDS_DEFAULT \ + "nand0=davinci_nand.0" +#define MTDPARTS_DEFAULT \ + "mtdparts=davinci_nand.0:384k(bootloader)ro,4m(kernel),-(filesystem)" #else #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ -#define CONFIG_ENV_SIZE SZ_128K +#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ #endif #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ -#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ #define CONFIG_SYS_NAND_BASE 0x02000000 +#define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ -#define DEF_BOOTM "" #elif defined(CONFIG_SYS_USE_NOR) #ifdef CONFIG_NOR_UART_BOOT #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ -#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ #else #undef CONFIG_SKIP_LOWLEVEL_INIT -#undef CONFIG_SKIP_RELOCATE_UBOOT #endif #define CONFIG_ENV_IS_IN_FLASH #undef CONFIG_SYS_NO_FLASH @@ -154,7 +156,6 @@ /*==============================*/ /* U-Boot general configuration */ /*==============================*/ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #define CONFIG_MISC_INIT_R #undef CONFIG_BOOTDELAY #define CONFIG_BOOTFILE "uImage" /* Boot file name */ @@ -167,7 +168,6 @@ #define CONFIG_VERSION_VARIABLE #define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP #define CONFIG_CRC32_VERIFY @@ -195,6 +195,11 @@ #define CONFIG_CMD_SAVES #define CONFIG_CMD_EEPROM #undef CONFIG_CMD_BDI + +#ifdef CONFIG_CMD_BDI +#define CONFIG_CLOCKS +#endif + #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR #ifdef CONFIG_SYS_USE_NAND @@ -222,11 +227,13 @@ #define CONFIG_PREBOOT "usb start" #endif #endif -/*=======================*/ -/* KGDB support (if any) */ -/*=======================*/ -#ifdef CONFIG_CMD_KGDB -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ -#endif + +#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */