X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fdavinci_sffsdr.h;h=c931ede85cfd7d79851fc6f0b03248ac421f526d;hb=79874ae9341d000d7428ae05d3bce54d90adb81c;hp=71d48fb912077da85ad2855b59b4d259e662e099;hpb=4d6c2dd7ed6c6bc4114ca5c7577560ea9ba50bd0;p=u-boot diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 71d48fb912..c931ede85c 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -28,7 +28,6 @@ #define CONFIG_SYS_NAND_LARGEPAGE #define CONFIG_SYS_USE_NAND #define CONFIG_SYS_USE_DSPLINK /* don't power up the DSP. */ -#define CONFIG_DISPLAY_CPUINFO /* SoC Configuration */ #define CONFIG_ARM926EJS /* arm926ejs CPU core */ #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ @@ -42,7 +41,6 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 /* Memory Info */ #define CONFIG_SYS_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */ #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */ #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ @@ -73,21 +71,19 @@ #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_OVERWRITE_ETHADDR_ONCE -#define CONFIG_NET_MULTI /* Flash & Environment */ #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH #define CONFIG_NAND_DAVINCI +#define CONFIG_SYS_NAND_CS 2 #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ -#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ #define CONFIG_SYS_NAND_BASE 0x02000000 #define CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ /* I2C switch definitions for PCA9543 chip */ #define CONFIG_SYS_I2C_PCA9543_ADDR 0x70 #define CONFIG_SYS_I2C_PCA9543_ADDR_LEN 0 /* Single register. */ @@ -144,9 +140,17 @@ #undef CONFIG_CMD_SETGETDCR #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_IMLS -/* KGDB support (if any) */ -#ifdef CONFIG_CMD_KGDB -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ + +#ifdef CONFIG_CMD_BDI +#define CONFIG_CLOCKS #endif + +#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */