X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fdavinci_sonata.h;h=cd23aaca209b7589e210f22fb9f75f6d3e8964f1;hb=3f5f17a38f609bdccf7405c3cbcf5bd2b08fa044;hp=ebfdafa24e99ce38fc30ee114c1c9f72e5bb4260;hpb=f74e142eaa398b0025ccfddebc60a30bc34bcdfd;p=u-boot

diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h
index ebfdafa24e..cd23aaca20 100644
--- a/include/configs/davinci_sonata.h
+++ b/include/configs/davinci_sonata.h
@@ -1,20 +1,7 @@
 /*
  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -51,14 +38,14 @@
 #define SONATA_BOARD
 #define CONFIG_SYS_NAND_SMALLPAGE
 #define CONFIG_SYS_USE_NOR
-#define CONFIG_DISPLAY_CPUINFO
+#define MACH_TYPE_SONATA 1254
+#define CONFIG_MACH_TYPE MACH_TYPE_SONATA
 /*===================*/
 /* SoC Configuration */
 /*===================*/
 #define CONFIG_ARM926EJS			/* arm926ejs CPU core */
 #define CONFIG_SYS_TIMERBASE		0x01c21400	/* use timer 0 */
 #define CONFIG_SYS_HZ_CLOCK		27000000	/* Timer Input clock freq */
-#define CONFIG_SYS_HZ			1000
 #define CONFIG_SOC_DM644X
 /*====================================================*/
 /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
@@ -75,7 +62,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x80000000	/* memtest start address */
 #define CONFIG_SYS_MEMTEST_END		0x81000000	/* 16MB RAM test */
 #define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
-#define CONFIG_STACKSIZE	(256*1024)	/* regular stack */
 #define PHYS_SDRAM_1		0x80000000	/* DDR Start */
 #define PHYS_SDRAM_1_SIZE	0x08000000	/* DDR size 128MB */
 #define DDR_4BANKS				/* 4-bank DDR2 (128MB) */
@@ -89,26 +75,22 @@
 #define CONFIG_SYS_NS16550_CLK	CONFIG_SYS_HZ_CLOCK	/* Input clock to NS16550 */
 #define CONFIG_CONS_INDEX	1		/* use UART0 for console */
 #define CONFIG_BAUDRATE		115200		/* Default baud rate */
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 /*===================*/
 /* I2C Configuration */
 /*===================*/
-#define CONFIG_HARD_I2C
-#define CONFIG_DRIVER_DAVINCI_I2C
-#define CONFIG_SYS_I2C_SPEED		80000	/* 100Kbps won't work, silicon bug */
-#define CONFIG_SYS_I2C_SLAVE		10	/* Bogus, master-only in U-Boot */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_DAVINCI
+#define CONFIG_SYS_DAVINCI_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
+#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10    /* Bogus, master-only in U-Boot */
 /*==================================*/
 /* Network & Ethernet Configuration */
 /*==================================*/
 #define CONFIG_DRIVER_TI_EMAC
-#define CONFIG_EMAC_MDIO_PHY_NUM	1
 #define CONFIG_MII
-#define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_NET_RETRY_COUNT	10
-#define CONFIG_NET_MULTI
 /*=====================*/
 /* Flash & Environment */
 /*=====================*/
@@ -139,6 +121,7 @@
 #define CONFIG_SYS_MAX_FLASH_BANKS	1		/* max number of flash banks */
 #define CONFIG_SYS_FLASH_SECT_SZ	0x20000		/* 128KB sect size AMD Flash */
 #define CONFIG_ENV_OFFSET		(CONFIG_SYS_FLASH_SECT_SZ*2)
+#define CONFIG_ENV_SIZE		CONFIG_SYS_FLASH_SECT_SZ
 #define PHYS_FLASH_1		0x02000000	/* CS2 Base address	 */
 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1	/* Flash Base for U-Boot */
 #define PHYS_FLASH_SIZE		0x2000000	/* Flash size 32MB	 */
@@ -148,7 +131,6 @@
 /*==============================*/
 /* U-Boot general configuration */
 /*==============================*/
-#undef	CONFIG_USE_IRQ			/* No IRQ/FIQ in U-Boot */
 #define CONFIG_MISC_INIT_R
 #undef CONFIG_BOOTDELAY
 #define CONFIG_BOOTFILE		"uImage"	/* Boot file name */
@@ -161,7 +143,6 @@
 #define CONFIG_VERSION_VARIABLE
 #define CONFIG_AUTO_COMPLETE		/* Won't work with hush so far, may be later */
 #define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
 #define CONFIG_CMDLINE_EDITING
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_CRC32_VERIFY
@@ -199,6 +180,10 @@
 #error "Either CONFIG_SYS_USE_NAND or CONFIG_SYS_USE_NOR _MUST_ be defined !!!"
 #endif
 
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
 #define CONFIG_MAX_RAM_BANK_SIZE	(256 << 20)	/* 256 MB */
 
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1