X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fdig297.h;h=af6f56bb348199b5d1ecfc12d53a6d5c3ae5ecf8;hb=0b3fde113648b7e08089be96606c06f52d9a0953;hp=dda758269a85041b70f2778180df329a43c19b22;hpb=6e2fbdea1b26d75314d87c380a36b0015bf824cf;p=u-boot diff --git a/include/configs/dig297.h b/include/configs/dig297.h index dda758269a..af6f56bb34 100644 --- a/include/configs/dig297.h +++ b/include/configs/dig297.h @@ -10,23 +10,7 @@ * * Configuration settings for the Comelit DIG297 board. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -46,6 +30,7 @@ #define CONFIG_OMAP /* in a TI OMAP core */ #define CONFIG_OMAP34XX /* which is a 34XX */ #define CONFIG_OMAP_GPIO +#define CONFIG_OMAP_COMMON #define CONFIG_SYS_TEXT_BASE 0x80008000 @@ -138,12 +123,10 @@ #undef CONFIG_CMD_NFS /* NFS support */ #define CONFIG_SYS_NO_FLASH -#define CONFIG_HARD_I2C -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 1 -#define CONFIG_SYS_I2C_BUS 0 -#define CONFIG_SYS_I2C_BUS_SELECT 1 -#define CONFIG_DRIVER_OMAP34XX_I2C 1 +#define CONFIG_SYS_I2C +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_OMAP34XX /* * TWL4030 @@ -160,8 +143,6 @@ #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ /* to access nand at */ /* CS0 */ -#define GPMC_NAND_ECC_LP_x16_LAYOUT - #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ #if defined(CONFIG_CMD_NET) @@ -256,14 +237,12 @@ */ #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ -#define CONFIG_SYS_HZ 1000 /*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 /*-----------------------------------------------------------------------