X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FeNET.h;h=78cab29e8c8526548665e75103d89f8fdfafc45e;hb=810c44274980d8bb9fa0d81d091a374adbae8309;hp=f643f7f07af0283aa51d732ea6717b24a633739e;hpb=6fd445c32860bb06e9a68b516845a1bbf7c37889;p=u-boot

diff --git a/include/configs/eNET.h b/include/configs/eNET.h
index f643f7f07a..78cab29e8c 100644
--- a/include/configs/eNET.h
+++ b/include/configs/eNET.h
@@ -29,8 +29,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_RELOC_FIXUP_WORKS
-
 /*
  * Stuff still to be dealt with -
  */
@@ -53,13 +51,12 @@
  * bottom (processor) board MUST be removed!
  */
 #undef CONFIG_WATCHDOG
-#undef CONFIG_HW_WATCHDOG
+#define CONFIG_HW_WATCHDOG
 
  /*-----------------------------------------------------------------------
   * Serial Configuration
   */
 #define CONFIG_SERIAL_MULTI
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
 #define CONFIG_CONS_INDEX		1
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
@@ -105,9 +102,10 @@
 #define CONFIG_CMD_LOADS	/* loads			*/
 #define CONFIG_CMD_MEMORY	/* md mm nm mw cp cmp crc base loop mtest */
 #define CONFIG_CMD_MISC		/* Misc functions like sleep etc*/
-#undef CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
+#define CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
 #undef CONFIG_CMD_NFS		/* NFS support			*/
 #define CONFIG_CMD_PCI		/* PCI support			*/
+#define CONFIG_CMD_PING		/* ICMP echo support		*/
 #define CONFIG_CMD_RUN		/* run command in env variable	*/
 #define CONFIG_CMD_SAVEENV	/* saveenv			*/
 #define CONFIG_CMD_SETGETDCR	/* DCR support on 4xx		*/
@@ -140,7 +138,7 @@
 
 #define	CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address	*/
 
-#define	CONFIG_SYS_HZ			1024		/* incrementer freq: 1kHz */
+#define	CONFIG_SYS_HZ			1000		/* incrementer freq: 1kHz */
 
 /*-----------------------------------------------------------------------
  * SDRAM Configuration
@@ -159,7 +157,7 @@
  * CPU Features
  */
 #define CONFIG_SYS_SC520_HIGH_SPEED	0	/* 100 or 133MHz */
-#undef  CONFIG_SYS_SC520_RESET			/* use SC520 MMCR's to reset cpu */
+#define CONFIG_SYS_SC520_RESET			/* use SC520 MMCR's to reset cpu */
 #define CONFIG_SYS_SC520_TIMER			/* use SC520 swtimers */
 #undef  CONFIG_SYS_GENERIC_TIMER		/* use the i8254 PIT timers */
 #undef  CONFIG_SYS_TSC_TIMER			/* use the Pentium TSC timers */
@@ -174,7 +172,7 @@
 #define CONFIG_SYS_STACK_SIZE		0x8000  	/* Size of bootloader stack */
 #define CONFIG_SYS_BL_START_FLASH	0x38040000	/* Address of relocated code */
 #define CONFIG_SYS_BL_START_RAM		0x03fd0000	/* Address of relocated code */
-#define CONFIG_SYS_MONITOR_BASE		TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)    /* Reserve 256 kB for Mon	*/
 #define CONFIG_SYS_FLASH_BASE		0x38000000	/* Boot Flash */
 #define CONFIG_SYS_FLASH_BASE_1		0x10000000	/* StrataFlash 1 */
@@ -226,13 +224,11 @@
 #define CONFIG_SYS_THIRD_PCI_IRQ   11
 #define CONFIG_SYS_FORTH_PCI_IRQ   15
 
-/*-----------------------------------------------------------------------
- * Hardware watchdog configuration
+ /*
+ * Network device (TRL8100B) support
  */
-#define CONFIG_SYS_WATCHDOG_PIO_BIT  		0x8000
-#define CONFIG_SYS_WATCHDIG_PIO_DATA 		SC520_PIODATA15_0
-#define CONFIG_SYS_WATCHDIG_PIO_CLR  		SC520_PIOCLR15_0
-#define CONFIG_SYS_WATCHDIG_PIO_SET  		SC520_PIOSET15_0
+#define CONFIG_NET_MULTI
+#define CONFIG_RTL8139
 
 /*-----------------------------------------------------------------------
  * FPGA configuration