X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FeXalion.h;h=61f34ddc446221a34c8134aea8720515036a31be;hb=810c44274980d8bb9fa0d81d091a374adbae8309;hp=bacdbf0e5d080611bfd7b9e99a2f632af58411cc;hpb=2ae1824196884ba2bafffb7c0d3e8297350591e9;p=u-boot

diff --git a/include/configs/eXalion.h b/include/configs/eXalion.h
index bacdbf0e5d..61f34ddc44 100644
--- a/include/configs/eXalion.h
+++ b/include/configs/eXalion.h
@@ -119,11 +119,10 @@
 #define CONFIG_SYS_INIT_DATA_SIZE	128
 
 #define CONFIG_SYS_INIT_RAM_ADDR	0x40000000
-#define CONFIG_SYS_INIT_RAM_END	0x1000
-#define CONFIG_SYS_INIT_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_INIT_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE	0x1000
+#define CONFIG_SYS_INIT_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_INIT_DATA_SIZE)
 
-#define CONFIG_SYS_GBL_DATA_SIZE	 256	/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 
@@ -414,16 +413,6 @@
 #  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value */
 #endif
 
-
-/*-----------------------------------------------------------------------
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM		0x02	/* Software reboot			*/
-
-
 /* values according to the manual */
 #define CONFIG_DRAM_50MHZ	1
 #define CONFIG_SDRAM_50MHZ