X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fedminiv2.h;h=adb505e1346b2b334be37bcb2d1a980be9191842;hb=833b6435de3e8cf5b06ba81cb1b2b50e044269ff;hp=055931cda63ed8f2370b319a45f26230acaf5832;hpb=93502a5e0adcfc0ce6cf8e3daa7eb9a4f4e53658;p=u-boot

diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
index 055931cda6..adb505e134 100644
--- a/include/configs/edminiv2.h
+++ b/include/configs/edminiv2.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ * Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
  *
  * Based on original Kirkwood support which is
  * (C) Copyright 2009
@@ -45,6 +45,7 @@
 #define CONFIG_88F5182		1	/* SOC Name */
 #define CONFIG_MACH_EDMINIV2	1	/* Machine type */
 
+#include <asm/arch/orion5x.h>
 /*
  * CLKs configurations
  */
@@ -60,7 +61,7 @@
 
 #define ORION5X_MPP0_7		0x00000003
 #define ORION5X_MPP8_15		0x55550000
-#define ORION5X_MPP16_23	0x00000000
+#define ORION5X_MPP16_23	0x00005555
 
 /*
  * Board-specific values for Orion5x GPIO low level init:
@@ -68,13 +69,18 @@
  * - GPIO16 is Power LED control (0 = on, 1 = off)
  * - GPIO17 is Power LED source select (0 = CPLD, 1 = GPIO16)
  * - GPIO18 is Power Button status (0 = Released, 1 = Pressed)
- * - Last GPIO is 26, further bits are supposed to be 0.
+ * - GPIO19 is SATA disk power toggle (toggles on 0-to-1)
+ * - GPIO22 is SATA disk power status ()
+ * - GPIO23 is supply status for SATA disk ()
+ * - GPIO24 is supply control for board (write 1 to power off)
+ * Last GPIO is 25, further bits are supposed to be 0.
  * Enable mask has ones for INPUT, 0 for OUTPUT.
- * Default is LED ON.
+ * Default is LED ON, board ON :)
  */
 
-#define ORION5X_GPIO_OUT_ENABLE	0x03fcffff
-#define ORION5X_GPIO_OUT_VALUE	0x03fcffff
+#define ORION5X_GPIO_OUT_ENABLE		0xfef4f0ca
+#define ORION5X_GPIO_OUT_VALUE		0x00000000
+#define ORION5X_GPIO_IN_POLARITY	0x000000d0
 
 /*
  * NS16550 Configuration
@@ -131,6 +137,9 @@
  * Commands configuration - using default command set for now
  */
 #include <config_cmd_default.h>
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_USB
 
 /*
  * Network
@@ -143,12 +152,65 @@
 #define CONFIG_PHY_BASE_ADR	0x8
 #define CONFIG_RESET_PHY_R	/* use reset_phy() to init mv8831116 PHY */
 #define CONFIG_NETCONSOLE	/* include NetConsole support   */
-#define CONFIG_NET_MULTI	/* specify more that one ports available */
 #define	CONFIG_MII		/* expose smi ove miiphy interface */
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
 #endif
 
+/*
+ * IDE
+ */
+#ifdef CONFIG_CMD_IDE
+#define __io
+#define CONFIG_IDE_PREINIT
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_EXT2
+/* ED Mini V has an IDE-compatible SATA connector for port 1 */
+#define CONFIG_MVSATA_IDE
+#define CONFIG_MVSATA_IDE_USE_PORT1
+/* Needs byte-swapping for ATA data register */
+#define CONFIG_IDE_SWAP_IO
+/* Data, registers and alternate blocks are at the same offset */
+#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0100)
+#define CONFIG_SYS_ATA_REG_OFFSET	(0x0100)
+#define CONFIG_SYS_ATA_ALT_OFFSET	(0x0100)
+/* Each 8-bit ATA register is aligned to a 4-bytes address */
+#define CONFIG_SYS_ATA_STRIDE		4
+/* Controller supports 48-bits LBA addressing */
+#define CONFIG_LBA48
+/* A single bus, a single device */
+#define CONFIG_SYS_IDE_MAXBUS		1
+#define CONFIG_SYS_IDE_MAXDEVICE	1
+/* ATA registers base is at SATA controller base */
+#define CONFIG_SYS_ATA_BASE_ADDR	ORION5X_SATA_BASE
+/* ATA bus 0 is orion5x port 1 on ED Mini V2 */
+#define CONFIG_SYS_ATA_IDE0_OFFSET	ORION5X_SATA_PORT1_OFFSET
+/* end of IDE defines */
+#endif /* CMD_IDE */
+
+/*
+ * Common USB/EHCI configuration
+ */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI		/* Enable EHCI USB support */
+#define CONFIG_USB_EHCI_MARVELL
+#define ORION5X_USB20_HOST_PORT_BASE ORION5X_USB20_PORT0_BASE
+#define CONFIG_USB_STORAGE
+#define CONFIG_DOS_PARTITION
+#define CONFIG_ISO_PARTITION
+#define CONFIG_SUPPORT_VFAT
+#endif /* CONFIG_CMD_USB */
+
+/*
+ * I2C related stuff
+ */
+#ifdef CONFIG_CMD_I2C
+#define CONFIG_I2C_MVTWSI
+#define CONFIG_I2C_MVTWSI_BASE		ORION5X_TWSI_BASE
+#define CONFIG_SYS_I2C_SLAVE		0x0
+#define CONFIG_SYS_I2C_SPEED		100000
+#endif
+
 /*
  *  Environment variables configurations
  */
@@ -160,9 +222,7 @@
 /*
  * Size of malloc() pool
  */
-#define CONFIG_SYS_MALLOC_LEN	(1024 * 128) /* 128kB for malloc() */
-/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE	128
+#define CONFIG_SYS_MALLOC_LEN	(1024 * 256) /* 256kB for malloc() */
 
 /*
  * Other required minimal configurations
@@ -173,11 +233,24 @@
 #define CONFIG_DISPLAY_CPUINFO		/* Display cpu info */
 #define CONFIG_NR_DRAM_BANKS		1
 
-#define CONFIG_STACKSIZE		0x00100000
 #define CONFIG_SYS_LOAD_ADDR		0x00800000
 #define CONFIG_SYS_MEMTEST_START	0x00400000
 #define CONFIG_SYS_MEMTEST_END		0x007fffff
 #define CONFIG_SYS_RESET_ADDRESS	0xffff0000
 #define CONFIG_SYS_MAXARGS		16
 
+/* Use the HUSH parser */
+#define CONFIG_SYS_HUSH_PARSER
+
+/* Enable command line editing */
+#define CONFIG_CMDLINE_EDITING
+
+/* provide extensive help */
+#define CONFIG_SYS_LONGHELP
+
+/* additions for new relocation code, must be added to all boards */
+#define CONFIG_SYS_SDRAM_BASE		0
+#define CONFIG_SYS_INIT_SP_ADDR	\
+	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
 #endif /* _CONFIG_EDMINIV2_H */