X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fenbw_cmc.h;h=cdea4a854656aeabf1c70e6cf67306d66b86942d;hb=ffb96d55d13759a7e4fe4ba5fc5e3eb6fac11738;hp=83aec790e6fefde9e7614f807894da8d67b3b09b;hpb=0990dc61787ec03b0ae7579a51e5eb661112f13f;p=u-boot diff --git a/include/configs/enbw_cmc.h b/include/configs/enbw_cmc.h index 83aec790e6..cdea4a8546 100644 --- a/include/configs/enbw_cmc.h +++ b/include/configs/enbw_cmc.h @@ -9,19 +9,7 @@ * * Copyright (C) 2007 Sergey Kubushyn * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -37,20 +25,19 @@ /* * SoC Configuration */ -#define CONFIG_ARM926EJS /* arm926ejs CPU core */ #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ #define CONFIG_SOC_DA850 /* TI DA850 SoC */ +#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) -#define CONFIG_SYS_HZ 1000 -#define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_DA850_LOWLEVEL #define CONFIG_ARCH_CPU_INIT +#define CONFIG_SYS_DA850_PLL_INIT +#define CONFIG_SYS_DA850_DDR_INIT #define CONFIG_DA8XX_GPIO #define CONFIG_HOSTNAME enbw_cmc -#define CONFIG_DISPLAY_CPUINFO #define MACH_TYPE_ENBW_CMC 3585 #define CONFIG_MACH_TYPE MACH_TYPE_ENBW_CMC @@ -70,7 +57,6 @@ #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256*1024) /* regular stack */ /* * Serial Driver info @@ -82,15 +68,14 @@ #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ #define CONFIG_BAUDRATE 115200 /* Default baud rate */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -#define CONFIG_SYS_DA850_LPSC_UART DAVINCI_LPSC_UART2 + /* * I2C Configuration */ -#define CONFIG_HARD_I2C -#define CONFIG_DRIVER_DAVINCI_I2C -#define CONFIG_SYS_I2C_SPEED 80000 -#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_DAVINCI +#define CONFIG_SYS_DAVINCI_I2C_SPEED 80000 +#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ #define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20 #define CONFIG_CMD_I2C @@ -101,6 +86,14 @@ #define CONFIG_SYS_DTT_LOW_TEMP -30 #define CONFIG_SYS_DTT_HYSTERESIS 3 +/* + * SPI Configuration + */ +#define CONFIG_DAVINCI_SPI +#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE +#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) +#define CONFIG_CMD_SPI + /* * Flash & Environment */ @@ -111,8 +104,8 @@ #define CONFIG_SYS_NAND_PAGE_2K #define CONFIG_SYS_NAND_CS 3 #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE -#define CONFIG_SYS_CLE_MASK 0x10 -#define CONFIG_SYS_ALE_MASK 0x8 +#define CONFIG_SYS_NAND_MASK_CLE 0x10 +#define CONFIG_SYS_NAND_MASK_ALE 0x8 #undef CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ @@ -140,12 +133,10 @@ */ #ifdef CONFIG_DRIVER_TI_EMAC #define CONFIG_MII -#define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_NET_MULTI #endif /* @@ -176,18 +167,15 @@ #define CONFIG_DEFAULT_SETTINGS_ADDR (CONFIG_ENV_ADDR_REDUND + \ CONFIG_ENV_SECT_SIZE) -#define xstr(s) str(s) -#define str(s) #s - #define CONFIG_EXTRA_ENV_SETTINGS \ "u-boot_addr_r=c0000000\0" \ - "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \ + "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ "load=tftp ${u-boot_addr_r} ${u-boot}\0" \ - "update=protect off " xstr(CONFIG_SYS_FLASH_BASE) " +${filesize};"\ - "erase " xstr(CONFIG_SYS_FLASH_BASE) " +${filesize};" \ - "cp.b ${u-boot_addr_r} " xstr(CONFIG_SYS_FLASH_BASE) \ + "update=protect off " __stringify(CONFIG_SYS_FLASH_BASE) " +${filesize};"\ + "erase " __stringify(CONFIG_SYS_FLASH_BASE) " +${filesize};" \ + "cp.b ${u-boot_addr_r} " __stringify(CONFIG_SYS_FLASH_BASE) \ " ${filesize};" \ - "protect on " xstr(CONFIG_SYS_FLASH_BASE) " +${filesize}\0"\ + "protect on " __stringify(CONFIG_SYS_FLASH_BASE) " +${filesize}\0"\ "netdev=eth0\0" \ "rootpath=/opt/eldk-arm/arm\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ @@ -199,9 +187,9 @@ "kernel_addr_r=c0700000\0" \ "fdt_addr_r=c0600000\0" \ "ramdisk_addr_r=c0b00000\0" \ - "fdt_file=" xstr(CONFIG_HOSTNAME) "/" \ - xstr(CONFIG_HOSTNAME) ".dtb\0" \ - "kernel_file=" xstr(CONFIG_HOSTNAME) "/uImage \0" \ + "fdt_file=" __stringify(CONFIG_HOSTNAME) "/" \ + __stringify(CONFIG_HOSTNAME) ".dtb\0" \ + "kernel_file=" __stringify(CONFIG_HOSTNAME) "/uImage \0" \ "nand_ld_ramdsk=nand read ${ramdisk_addr_r} 320000 400000\0" \ "nand_ld_kernel=nand read ${kernel_addr_r} 20000 300000\0" \ "nand_ld_fdt=nand read ${fdt_addr_r} 0 2000\0" \ @@ -226,9 +214,9 @@ "key_magic_2=2\0" \ "key_magic_3=3\0" \ "magic_keys=0123\0" \ - "hwconfig=switch:lan=on,pwl=off\0" \ + "hwconfig=switch:lan=on,pwl=off,config=0x60100000\0" \ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ - "addmisc=setenv bootargs ${bootargs} davinci_mmc.use_dma=0\0" \ + "addmisc=setenv bootargs ${bootargs}\0" \ "mtdids=" MTDIDS_DEFAULT "\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ "logversion=2\0" \ @@ -238,7 +226,6 @@ * U-Boot general configuration */ #define CONFIG_BOOTFILE "uImage" /* Boot file name */ -#define CONFIG_SYS_PROMPT "=> " /* Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ @@ -247,7 +234,6 @@ #define CONFIG_VERSION_VARIABLE #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP #define CONFIG_CRC32_VERIFY @@ -271,6 +257,10 @@ #define CONFIG_CMD_MEMORY #define CONFIG_CMD_CACHE +#ifdef CONFIG_CMD_BDI +#define CONFIG_CLOCKS +#endif + #ifndef CONFIG_DRIVER_TI_EMAC #undef CONFIG_CMD_NET #undef CONFIG_CMD_DHCP @@ -334,6 +324,11 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_MMC +/* GPIO */ +#define CONFIG_ENBW_CMC_BOARD_TYPE 57 +#define CONFIG_ENBW_CMC_HW_ID_BIT0 39 +#define CONFIG_ENBW_CMC_HW_ID_BIT1 38 +#define CONFIG_ENBW_CMC_HW_ID_BIT2 35 /* FDT support */ #define CONFIG_OF_LIBFDT @@ -436,12 +431,14 @@ #define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11) #define CONFIG_POST (CONFIG_SYS_POST_MEMORY) -#define CONFIG_SYS_POST_WORD_ADDR 0x8001FFF0 +#define CONFIG_POST_EXTERNAL_WORD_FUNCS +#define CONFIG_SYS_POST_WORD_ADDR DAVINCI_RTC_BASE #define CONFIG_LOGBUFFER #define CONFIG_SYS_CONSOLE_IS_IN_ENV #define CONFIG_BOOTCOUNT_LIMIT #define CONFIG_SYS_BOOTCOUNT_ADDR DAVINCI_RTC_BASE +#define CONFIG_SYS_BOOTCOUNT_BE #define CONFIG_SYS_NAND_U_BOOT_DST 0xc0080000 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x60004000