X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Ffavr-32-ezkit.h;h=338d3dc78239b30a2d71412812fcf0574ee8d827;hb=eaf8c986d36e9fadd244093b17a7fe090b0b572a;hp=757636decba2a4d598ff2b27afa968c90c4e532e;hpb=31a4f1e5b6ee9b6335f0313dce7637cef887f84f;p=u-boot

diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h
index 757636decb..338d3dc782 100644
--- a/include/configs/favr-32-ezkit.h
+++ b/include/configs/favr-32-ezkit.h
@@ -3,40 +3,19 @@
  *
  * Configuration settings for the Favr-32 EarthLCD LCD kit.
  *
- * See file CREDITS for list of people who contributed to this project.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
- * Place, Suite 330, Boston, MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
 #include <asm/arch/hardware.h>
 
-#define CONFIG_AVR32
 #define CONFIG_AT32AP
 #define CONFIG_AT32AP7000
 #define CONFIG_FAVR32_EZKIT
 
 #define CONFIG_FAVR32_EZKIT_EXT_FLASH
 
-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ				1000
-
 /*
  * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
  * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
@@ -150,7 +129,8 @@
 #define CONFIG_SYS_NR_PIOS			5
 #define CONFIG_SYS_HSDRAMC
 #define CONFIG_MMC
-#define CONFIG_ATMEL_MCI
+#define CONFIG_GENERIC_ATMEL_MCI
+#define CONFIG_GENERIC_MMC
 
 #define CONFIG_SYS_DCACHE_LINESZ		32
 #define CONFIG_SYS_ICACHE_LINESZ		32