X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Ffavr-32-ezkit.h;h=75bff4ce288af391f6590be8c323dfc71c186996;hb=058d23168752c2a2ec0a6c3b50296cb5b91ec6d0;hp=14f078481736fbb38319329fedf3cfb19213d2c5;hpb=c2120fbfbc4d1f6953228f86be8bdbf38bacfdab;p=u-boot

diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h
index 14f0784817..75bff4ce28 100644
--- a/include/configs/favr-32-ezkit.h
+++ b/include/configs/favr-32-ezkit.h
@@ -10,19 +10,12 @@
 
 #include <asm/arch/hardware.h>
 
-#define CONFIG_AVR32
 #define CONFIG_AT32AP
 #define CONFIG_AT32AP7000
 #define CONFIG_FAVR32_EZKIT
 
 #define CONFIG_FAVR32_EZKIT_EXT_FLASH
 
-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ				1000
-
 /*
  * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
  * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
@@ -169,7 +162,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
 
 #define CONFIG_SYS_MALLOC_LEN			(256*1024)
-#define CONFIG_SYS_DMA_ALLOC_LEN		(16384)
 
 /* Allow 4MB for the kernel run-time image */
 #define CONFIG_SYS_LOAD_ADDR			(EBI_SDRAM_BASE + 0x00400000)