X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Ffavr-32-ezkit.h;h=75bff4ce288af391f6590be8c323dfc71c186996;hb=763754549fa818d74c41e9e325e76fd881b42269;hp=71d2473a90d020d8ad12a29cf1b91f3451114de3;hpb=5c877b1ae0a4219ed6bd8d32cf3f7106b81ecb3b;p=u-boot

diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h
index 71d2473a90..75bff4ce28 100644
--- a/include/configs/favr-32-ezkit.h
+++ b/include/configs/favr-32-ezkit.h
@@ -3,40 +3,19 @@
  *
  * Configuration settings for the Favr-32 EarthLCD LCD kit.
  *
- * See file CREDITS for list of people who contributed to this project.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
- * Place, Suite 330, Boston, MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
 #include <asm/arch/hardware.h>
 
-#define CONFIG_AVR32
 #define CONFIG_AT32AP
 #define CONFIG_AT32AP7000
 #define CONFIG_FAVR32_EZKIT
 
 #define CONFIG_FAVR32_EZKIT_EXT_FLASH
 
-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ				1000
-
 /*
  * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
  * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
@@ -152,7 +131,6 @@
 #define CONFIG_MMC
 #define CONFIG_GENERIC_ATMEL_MCI
 #define CONFIG_GENERIC_MMC
-#define CONFIG_SYS_MMC_MAX_BLK_COUNT 1
 
 #define CONFIG_SYS_DCACHE_LINESZ		32
 #define CONFIG_SYS_ICACHE_LINESZ		32
@@ -184,7 +162,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
 
 #define CONFIG_SYS_MALLOC_LEN			(256*1024)
-#define CONFIG_SYS_DMA_ALLOC_LEN		(16384)
 
 /* Allow 4MB for the kernel run-time image */
 #define CONFIG_SYS_LOAD_ADDR			(EBI_SDRAM_BASE + 0x00400000)