X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fibf-dsp561.h;h=4cd0f771462d84f816fa68ecfee01ecd75bbb236;hb=9f03247edc7761b608db31104821b4518a70e691;hp=77387426403c97856ff403a4e6553b7f54cf9ffb;hpb=f348ab85f741dc98b2d202c04b5f430eace94925;p=u-boot

diff --git a/include/configs/ibf-dsp561.h b/include/configs/ibf-dsp561.h
index 7738742640..4cd0f77146 100644
--- a/include/configs/ibf-dsp561.h
+++ b/include/configs/ibf-dsp561.h
@@ -1,5 +1,5 @@
 /*
- * U-boot - Configuration file for IBF-DSP561 board
+ * U-Boot - Configuration file for IBF-DSP561 board
  */
 
 #ifndef __CONFIG_IBF_DSP561__H__
@@ -7,14 +7,12 @@
 
 #include <asm/config-pre.h>
 
-
 /*
  * Processor Settings
  */
 #define CONFIG_BFIN_CPU             bf561-0.5
 #define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_BYPASS
 
-
 /*
  * Clock Settings
  *	CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
@@ -38,7 +36,6 @@
 /* Values can range from 1-15						*/
 #define CONFIG_SCLK_DIV			5
 
-
 /*
  * Memory Settings
  */
@@ -56,6 +53,13 @@
 #define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
 #define CONFIG_SYS_MALLOC_LEN	(128 * 1024)
 
+/*
+ * Network Settings
+ */
+#define ADI_CMDS_NETWORK	1
+#define CONFIG_DRIVER_AX88180	1
+#define AX88180_BASE		0x2c000000
+#define CONFIG_HOSTNAME		ibf-dsp561
 
 /*
  * Flash Settings
@@ -68,58 +72,41 @@
 #define CONFIG_SYS_MAX_FLASH_SECT	135	/* max number of sectors on one chip */
 /* The BF561-EZKIT uses a top boot flash */
 #define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_ADDR		0x20004000
-#define CONFIG_ENV_OFFSET		(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
+#define CONFIG_ENV_OFFSET		0x4000
+#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
 #define CONFIG_ENV_SIZE		0x2000
-#define CONFIG_ENV_SECT_SIZE	0x10000	/* Total Size of Environment Sector */
+#define CONFIG_ENV_SECT_SIZE	0x12000	/* Total Size of Environment Sector */
 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
 #define ENV_IS_EMBEDDED
 #else
-#define ENV_IS_EMBEDDED_CUSTOM
+#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
+#endif
+#ifdef ENV_IS_EMBEDDED
+/* WARNING - the following is hand-optimized to fit within
+ * the sector before the environment sector. If it throws
+ * an error during compilation remove an object here to get
+ * it linked after the configuration sector.
+ */
+# define LDS_BOARD_TEXT \
+	arch/blackfin/lib/built-in.o (.text*); \
+	arch/blackfin/cpu/built-in.o (.text*); \
+	. = DEFINED(env_offset) ? env_offset : .; \
+	common/env_embedded.o (.text*);
 #endif
-
 
 /*
  * I2C Settings
  */
-#define CONFIG_SOFT_I2C		1
-#define PF_SCL			0x1/*PF0*/
-#define PF_SDA			0x2/*PF1*/
-
-#ifdef CONFIG_SOFT_I2C
-#define I2C_INIT       do { *pFIO0_DIR |= PF_SCL; SSYNC(); } while (0)
-#define I2C_ACTIVE     do { *pFIO0_DIR |= PF_SDA; *pFIO0_INEN &= ~PF_SDA; SSYNC(); } while (0)
-#define I2C_TRISTATE   do { *pFIO0_DIR &= ~PF_SDA; *pFIO0_INEN |= PF_SDA; SSYNC(); } while (0)
-#define I2C_READ       ((*pFIO0_FLAG_D & PF_SDA) != 0)
-#define I2C_SDA(bit) \
-	do { \
-		if (bit) \
-			*pFIO0_FLAG_S = PF_SDA; \
-		else \
-			*pFIO0_FLAG_C = PF_SDA; \
-		SSYNC(); \
-	} while (0)
-#define I2C_SCL(bit) \
-	do { \
-		if (bit) \
-			*pFIO0_FLAG_S = PF_SCL; \
-		else \
-			*pFIO0_FLAG_C = PF_SCL; \
-		SSYNC(); \
-	} while (0)
-#define I2C_DELAY		udelay(5)	/* 1/4 I2C clock duration */
-
-#define CONFIG_SYS_I2C_SPEED	50000
-#define CONFIG_SYS_I2C_SLAVE	0
-#endif
-
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT		/* I2C bit-banged */
+#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
+#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
 
 /*
  * Misc Settings
  */
 #define CONFIG_UART_CONSOLE	0
 
-
 /*
  * Pull in common ADI header for remaining command/environment setup
  */