X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Ficon.h;h=2fac0efe13051902c9946497bc4678371b963e5a;hb=810c44274980d8bb9fa0d81d091a374adbae8309;hp=779af25fae60994b44ed769170db3a9bf397260b;hpb=550650ddd0fde00f245bc3da72d7272844198394;p=u-boot

diff --git a/include/configs/icon.h b/include/configs/icon.h
index 779af25fae..2fac0efe13 100644
--- a/include/configs/icon.h
+++ b/include/configs/icon.h
@@ -35,6 +35,9 @@
 #define CONFIG_4xx		1		/* ... PPC4xx family	*/
 #define CONFIG_440		1		/* ... PPC440 family	*/
 #define CONFIG_440SPE		1		/* Specifc SPe support	*/
+
+#define	CONFIG_SYS_TEXT_BASE	0xFFFA0000
+
 #define CONFIG_SYS_CLK_FREQ	33333333	/* external freq to pll	*/
 #define CONFIG_SYS_4xx_RESET_TYPE 0x2	/* use chip reset on this board	*/
 
@@ -94,13 +97,11 @@
 #define CONFIG_SYS_TEMP_STACK_OCM	1
 #define CONFIG_SYS_OCM_DATA_ADDR	CONFIG_SYS_ISRAM_BASE
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_ISRAM_BASE	/* Init RAM */
-#define CONFIG_SYS_INIT_RAM_END		0x2000		/* end used area */
-#define CONFIG_SYS_GBL_DATA_SIZE	128		/* sizeof init data */
+#define CONFIG_SYS_INIT_RAM_SIZE	0x2000		/* size of used area */
 
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - \
-					 CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
+					 GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
 
 /*
  * Serial Port