X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fimx31_phycore.h;h=54e8121008e6ab7b5a03399b9fc454a6ff8f409f;hb=e9b3ce3f7ebf1c0dd13bff799de854a7f2f905e1;hp=17283582116915c1c02766039a7359fc7cd9232f;hpb=26750c8aee2383a026e0cf89e9310628d3a5a6a0;p=u-boot diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h index 1728358211..54e8121008 100644 --- a/include/configs/imx31_phycore.h +++ b/include/configs/imx31_phycore.h @@ -6,23 +6,7 @@ * * Configuration settings for the phyCORE-i.MX31 board. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -31,11 +15,11 @@ #include /* High Level Configuration Options */ -#define CONFIG_ARM1136 /* This is an arm1136 CPU core */ -#define CONFIG_MX31 /* in a mx31 */ -#define CONFIG_MX31_HCLK_FREQ 26000000 +#define CONFIG_MX31 /* This is a mx31 */ #define CONFIG_MX31_CLK32 32000 +#define CONFIG_SYS_GENERIC_BOARD + #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO @@ -52,11 +36,10 @@ * Hardware drivers */ -#define CONFIG_HARD_I2C -#define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_MX31_PORT2 -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 0xfe +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ +#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE @@ -69,9 +52,6 @@ /*********************************************************** * Command definition ***********************************************************/ - -#include - #define CONFIG_CMD_PING #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C @@ -138,17 +118,8 @@ #define CONFIG_SYS_LOAD_ADDR 0 /* default load address */ -#define CONFIG_SYS_HZ 1000 - #define CONFIG_CMDLINE_EDITING -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ - /* * Physical Memory Map */