X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Finka4x0.h;h=773d5d2c1d963374b0923f8da78e359fbe0390b8;hb=8d7e2732221bc2d64df14f700c64c23e0a4c3dce;hp=e272f715d3b4a5abda53a4ff43a8b99f2120783c;hpb=1968e615d4092f728f4732a0b148ded6d1caa731;p=u-boot diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h index e272f715d3..773d5d2c1d 100644 --- a/include/configs/inka4x0.h +++ b/include/configs/inka4x0.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2003-2004 + * (C) Copyright 2003-2005 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -80,12 +80,20 @@ * Supported commands */ #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ + CFG_CMD_DHCP | \ + CFG_CMD_EXT2 | \ + CFG_CMD_FAT | \ + CFG_CMD_IDE | \ + CFG_CMD_NFS | \ CFG_CMD_PCI | \ + CFG_CMD_SNTP | \ CFG_CMD_USB ) /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include +#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ + #if (TEXT_BASE == 0xFFE00000) /* Boot low */ # define CFG_LOWBOOT 1 #endif @@ -93,7 +101,7 @@ /* * Autobooting */ -#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ +#define CONFIG_BOOTDELAY 1 /* autoboot after 1 second */ #define CONFIG_PREBOOT "echo;" \ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ @@ -101,21 +109,40 @@ #undef CONFIG_BOOTARGS +#define CONFIG_ETHADDR 00:a0:a4:03:00:00 +#define CONFIG_OVERWRITE_ETHADDR_ONCE + +#define CONFIG_IPADDR 192.168.100.2 +#define CONFIG_SERVERIP 192.168.100.1 +#define CONFIG_NETMASK 255.255.255.0 +#define HOSTNAME inka4x0 +#define CONFIG_BOOTFILE /tftpboot/inka4x0/uImage +#define CONFIG_ROOTPATH /opt/eldk/ppc_6xx + #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$(serverip):$(rootpath)\0" \ + "nfsroot=${serverip}:${rootpath}\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "addip=setenv bootargs $(bootargs) " \ - "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ - ":$(hostname):$(netdev):off panic=1\0" \ - "flash_nfs=run nfsargs addip;" \ - "bootm $(kernel_addr)\0" \ - "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \ - "rootpath=/opt/eldk/ppc_82xx\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "addcons=setenv bootargs ${bootargs} " \ + "console=ttyS0,${baudrate}\0" \ + "flash_nfs=run nfsargs addip addcons;" \ + "bootm ${kernel_addr}\0" \ + "net_nfs=tftp 200000 ${bootfile};" \ + "run nfsargs addip addcons;bootm\0" \ + "enable_disp=mw.l 100000 04000000 1;" \ + "cp.l 100000 f0000b20 1;" \ + "cp.l 100000 f0000b28 1\0" \ + "ideargs=setenv bootargs root=/dev/hda1 rw\0" \ + "ide_boot=ext2load ide 0:1 200000 uImage;" \ + "run ideargs addip addcons enable_disp;bootm" \ + "brightness=255\0" \ "" -#define CONFIG_BOOTCOMMAND "run net_nfs" +#define CONFIG_BOOTCOMMAND "run ide_boot" /* * IPB Bus clocking configuration. @@ -185,12 +212,13 @@ */ /* #define CONFIG_FEC_10MBIT 1 */ #define CONFIG_PHY_ADDR 0x00 +#define CONFIG_MII /* * GPIO configuration * - * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1): - * Bit 0 (mask: 0x80000000): 1 + * use CS1 as gpio_wkup_6 output + * Bit 0 (mask: 0x80000000): 0 * use ALT CAN position: Bits 2-3 (mask: 0x30000000): * 00 -> No Alternatives, I2C1 is used for onboard EEPROM * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1 do not use on TQM5200 with onboard @@ -198,14 +226,8 @@ * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100 * use PSC6_1 and PSC6_3 as GPIO: Bits 9:11 (mask: 0x07000000): * 011 -> PSC6 could not be used as UART or CODEC. IrDA still possible. - * GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST - * tests. */ -#if defined (CONFIG_MINIFAP) -#define CFG_GPS_PORT_CONFIG 0x93000004 -#else -#define CFG_GPS_PORT_CONFIG 0x81001004 -#endif +#define CFG_GPS_PORT_CONFIG 0x01001004 /* * RTC configuration @@ -259,6 +281,21 @@ #define CFG_CS0_START CFG_FLASH_BASE #define CFG_CS0_SIZE CFG_FLASH_SIZE +/* 32Mbit SRAM @0x30000000 */ +#define CFG_CS1_START 0x30000000 +#define CFG_CS1_SIZE 0x00400000 +#define CFG_CS1_CFG 0x31800 /* for pci_clk = 33 MHz */ + +/* 2 quad UART @0x80000000 (MBAR is relocated to 0xF0000000) */ +#define CFG_CS2_START 0x80000000 +#define CFG_CS2_SIZE 0x0001000 +#define CFG_CS2_CFG 0x21800 /* for pci_clk = 33 MHz */ + +/* GPIO in @0x30400000 */ +#define CFG_CS3_START 0x30400000 +#define CFG_CS3_SIZE 0x00100000 +#define CFG_CS3_CFG 0x31800 /* for pci_clk = 33 MHz */ + #define CFG_CS_BURST 0x00000000 #define CFG_CS_DEADCYCLE 0x33333333 @@ -271,4 +308,31 @@ #define CONFIG_USB_CONFIG 0x00001000 #define CONFIG_USB_STORAGE +/*----------------------------------------------------------------------- + * IDE/ATA stuff Supports IDE harddisk + *----------------------------------------------------------------------- + */ + +#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */ + +#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */ +#undef CONFIG_IDE_LED /* LED for ide not supported */ + +#define CONFIG_IDE_RESET /* reset for ide supported */ +#define CONFIG_IDE_PREINIT + +#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */ +#define CFG_IDE_MAXDEVICE 2 /* max. 1 drive per IDE bus */ + +#define CFG_ATA_IDE0_OFFSET 0x0000 +#define CFG_ATA_BASE_ADDR MPC5XXX_ATA +#define CFG_ATA_DATA_OFFSET 0x0060 /* Offset for data I/O */ +#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET) /* Offset for normal register accesses */ +#define CFG_ATA_ALT_OFFSET 0x005C /* Offset for alternate registers */ +#define CFG_ATA_STRIDE 4 /* Interval between registers */ + +#define CONFIG_ATAPI 1 + +#define CFG_BRIGHTNESS 0xFF /* LCD Default Brightness (255 = off) */ + #endif /* __CONFIG_H */