X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fintegratorcp.h;h=ca02a6f1d6bb1155f53906673ce3bab24b237d8c;hb=59ee45ee91cc91b392a8e2684bfcb8c933ce4967;hp=3fcb8af5706bb2ed92808a8d1b74a0d69f7793ca;hpb=3d3befa754fedb320f779320ac0ab11deb0a6275;p=u-boot diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 3fcb8af570..ca02a6f1d6 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -31,101 +31,95 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */ -#define CONFIG_INTEGRATOR 1 /* in an Integrator board */ -#define CONFIG_ARCH_CINTEGRATOR 1 /* Specifically, a CP */ +#include "integrator-common.h" - -#define CFG_MEMTEST_START 0x100000 -#define CFG_MEMTEST_END 0x10000000 -#define CFG_HZ (1000000 / 256) /* Timer 1 is clocked at 1Mhz, with 256 divider */ -#define CFG_TIMERBASE 0x13000100 - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_MISC_INIT_R 1 /* call misc_init_r during start up */ -/* - * Size of malloc() pool - */ -#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +/* Integrator CP-specific configuration */ +#define CONFIG_ARCH_CINTEGRATOR +#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer 1 is clocked at 1Mhz */ /* * Hardware drivers */ -#define CONFIG_DRIVER_SMC91111 +#define CONFIG_SMC91111 #define CONFIG_SMC_USE_32_BIT #define CONFIG_SMC91111_BASE 0xC8000000 #undef CONFIG_SMC91111_EXT_PHY -/* - * NS16550 Configuration - */ -#define CFG_PL011_SERIAL +/* PL011 configuration */ +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_CLOCK 14745600 +#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, (void *)CONFIG_SYS_SERIAL1 } #define CONFIG_CONS_INDEX 0 -#define CONFIG_BAUDRATE 38400 -#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -#define CFG_SERIAL0 0x16000000 -#define CFG_SERIAL1 0x17000000 - -#define CONFIG_COMMANDS (CFG_CMD_DHCP | CFG_CMD_IMI | CFG_CMD_NET | CFG_CMD_PING | CFG_CMD_BDI | CFG_CMD_MEMORY) -#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT +#define CONFIG_BAUDRATE 38400 +#define CONFIG_SYS_SERIAL0 0x16000000 +#define CONFIG_SYS_SERIAL1 0x17000000 -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include +/* + * Command line configuration. + */ +#include #define CONFIG_BOOTDELAY 2 -#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0" -#define CONFIG_BOOTCOMMAND "bootp ; bootm" +#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" +#define CONFIG_BOOTCOMMAND "tftpboot ; bootm" +#define CONFIG_SERVERIP 192.168.1.100 +#define CONFIG_IPADDR 192.168.1.104 +#define CONFIG_BOOTFILE "uImage" /* * Miscellaneous configurable options */ -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "Integrator-CP # " /* Monitor Command Prompt */ -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -/* Print Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ - -#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ -#define CFG_LOAD_ADDR 0x7fc0 /* default load address */ - -/*----------------------------------------------------------------------- - * Stack sizes +#define CONFIG_SYS_PROMPT "Integrator-CP # " /* Monitor Command Prompt */ + +/* + * FLASH and environment organization + * Top varies according to amount fitted + * Reserve top 4 blocks of flash + * - ARM Boot Monitor + * - Unused + * - SIB block + * - U-Boot environment * - * The stack sizes are set up in start.S using the settings below + * Base is always 0x24000000 */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif +#define CONFIG_SYS_FLASH_BASE 0x24000000 +#define CONFIG_SYS_FLASH_CFI 1 +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_MAX_FLASH_SECT 64 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define PHYS_FLASH_SIZE 0x01000000 /* 16MB */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ + +#define CONFIG_SYS_MONITOR_LEN 0x00100000 +#define CONFIG_ENV_IS_IN_FLASH 1 -/*----------------------------------------------------------------------- - * Physical Memory Map +/* + * Move up the U-Boot & monitor area if more flash is fitted. + * If this U-Boot is to be run on Integrators with varying flash sizes, + * drivers/mtd/cfi_flash.c::flash_init() can read the Integrator CP_FLASHPROG + * register and dynamically assign CONFIG_ENV_ADDR & CONFIG_SYS_MONITOR_BASE + * - CONFIG_SYS_MONITOR_BASE is set to indicate that the environment is not + * embedded in the boot monitor(s) area */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ +#if ( PHYS_FLASH_SIZE == 0x04000000 ) -#define CFG_FLASH_BASE 0x24000000 -#define PHYS_FLASH_1 (CFG_FLASH_BASE) +#define CONFIG_ENV_ADDR 0x27F00000 +#define CONFIG_SYS_MONITOR_BASE 0x27F40000 -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CFG_ENV_IS_NOWHERE -#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define PHYS_FLASH_SIZE 0x01000000 /* 16MB */ -/* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */ -#define CFG_MAX_FLASH_SECT 128 -#define CFG_ENV_SIZE 32768 - -#endif /* __CONFIG_H */ +#elif (PHYS_FLASH_SIZE == 0x02000000 ) + +#define CONFIG_ENV_ADDR 0x25F00000 +#define CONFIG_SYS_MONITOR_BASE 0x25F40000 + +#else + +#define CONFIG_ENV_ADDR 0x24F00000 +#define CONFIG_SYS_MONITOR_BASE 0x27F40000 + +#endif + +#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */ +#define CONFIG_ENV_SIZE 8192 /* 8KB */ + +#endif /* __CONFIG_H */