X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fixdp425.h;h=9f9fdb25e2c86adbc475425097f4b93d5dc16b1e;hb=4745acaa1a603b67f6b9b7970365ebadd7d6586f;hp=1862b06a03deea341712fe8945a33dde8056c5f6;hpb=42d1f0394bef0624fc9664714d54bb137931d6a6;p=u-boot diff --git a/include/configs/ixdp425.h b/include/configs/ixdp425.h index 1862b06a03..9f9fdb25e2 100644 --- a/include/configs/ixdp425.h +++ b/include/configs/ixdp425.h @@ -33,39 +33,40 @@ #define CONFIG_IXP425 1 /* This is an IXP425 CPU */ #define CONFIG_IXDP425 1 /* on an IXDP425 Board */ +#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */ +#define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */ + /*************************************************************** * U-boot generic defines start here. ***************************************************************/ -/* - * If we are developing, we might want to start armboot from ram - * so we MUST NOT initialize critical regs like mem-timing ... - */ -#define CONFIG_INIT_CRITICAL /* undef for developing */ - #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ /* * Size of malloc() pool */ #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_BAUDRATE 115200 -#define CONFIG_COMMANDS (CONFIG_CMD_DFL & ~CFG_CMD_NET) +#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_ELF | CFG_CMD_PCI) +#define CONFIG_PCI +#define CONFIG_NET_MULTI +#define CONFIG_EEPRO100 /* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */ /* These are u-boot generic parameters */ #include #define CONFIG_BOOTDELAY 3 -#define CONFIG_ETHADDR 08:00:3e:26:0a:5b -#define CONFIG_NETMASK 255.255.0.0 +/*#define CONFIG_ETHADDR 08:00:3e:26:0a:5b*/ +#define CONFIG_NETMASK 255.255.255.0 #define CONFIG_IPADDR 192.168.0.21 -#define CONFIG_SERVERIP 192.168.0.250 +#define CONFIG_SERVERIP 192.168.0.148 #define CONFIG_BOOTCOMMAND "bootm 50040000" #define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200" #define CONFIG_CMDLINE_TAG @@ -137,6 +138,8 @@ #define CFG_DRAM_SIZE 0x01000000 #define CFG_FLASH_BASE PHYS_FLASH_1 +#define CFG_MONITOR_BASE CFG_FLASH_BASE +#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ /* * Expansion bus settings @@ -146,26 +149,38 @@ /* * SDRAM settings */ -#define CFG_SDR_CONFIG 0xd +#define CFG_SDR_CONFIG 0xd +#define CFG_SDR_MODE_CONFIG 0x1 #define CFG_SDRAM_REFRESH_CNT 0x81a /* * GPIO settings */ +/* + * FLASH and environment organization + */ /* * FLASH and environment organization */ #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ +#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ + +#define CFG_FLASH_CFI /* The flash is CFI compatible */ +#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CFG_ENV_IS_IN_FLASH 1 + +#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1 } + +#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */ + +#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ -/* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */ +#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ -/* FIXME */ -#define CFG_ENV_IS_IN_FLASH 1 -#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) /* Addr of Environment Sector */ -#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ +#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */ +#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) +#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ #endif /* __CONFIG_H */