X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fkatmai.h;h=3143b631ce96c7b9c10eaeeea8d5389e369d739c;hb=7f0ef5a945a0a9cef773c2b05b157d2fef3ea7ad;hp=76e9a762640b887f245a1ec52f53dcd3318feabf;hpb=96623171423a94092cde80642328fda58a92c894;p=u-boot diff --git a/include/configs/katmai.h b/include/configs/katmai.h index 76e9a76264..3143b631ce 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -4,23 +4,7 @@ * * (C) Copyright 2004 Paul Reynolds * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /************************************************************************ @@ -34,17 +18,17 @@ * High Level Configuration Options *----------------------------------------------------------------------*/ #define CONFIG_KATMAI 1 /* Board is Katmai */ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_440SPE 1 /* Specifc SPe support */ #define CONFIG_440SPE_REVA 1 /* Support old Rev A. */ #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ #define CONFIG_SYS_4xx_RESET_TYPE 0x2 /* use chip reset on this board */ +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 + /* * Enable this board for more than 2GB of SDRAM */ -#define CONFIG_PHYS_64BIT #define CONFIG_VERY_BIG_RAM /* @@ -53,14 +37,6 @@ #define CONFIG_HOSTNAME katmai #include "amcc-common.h" -/* - * For booting 256K-paged Linux we should have 16MB of memory - * for Linux initial memory map - */ -#undef CONFIG_SYS_BOOTMAPSZ -#define CONFIG_SYS_BOOTMAPSZ (16 << 20) - -#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #undef CONFIG_SHOW_BOOT_PROGRESS /*----------------------------------------------------------------------- @@ -68,7 +44,6 @@ * actual resources get mapped (not physical addresses) *----------------------------------------------------------------------*/ #define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */ -#define CONFIG_SYS_PERIPHERAL_BASE 0xa0000000 /* internal peripherals */ #define CONFIG_SYS_ISRAM_BASE 0x90000000 /* internal SRAM */ #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped PCI memory */ @@ -102,17 +77,15 @@ #define CONFIG_SYS_TEMP_STACK_OCM 1 #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /*----------------------------------------------------------------------- * Serial Port *----------------------------------------------------------------------*/ -#undef CONFIG_UART1_CONSOLE +#define CONFIG_CONS_INDEX 1 /* Use UART0 */ #undef CONFIG_SYS_EXT_SERIAL_CLOCK /*----------------------------------------------------------------------- @@ -127,15 +100,13 @@ /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 -#define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */ #define IIC0_BOOTPROM_ADDR 0x50 #define IIC0_ALT_BOOTPROM_ADDR 0x54 -#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR (0x50) #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 @@ -188,11 +159,10 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_AMCC_DEF_ENV \ CONFIG_AMCC_DEF_ENV_POWERPC \ - CONFIG_AMCC_DEF_ENV_PPC_OLD \ CONFIG_AMCC_DEF_ENV_NOR_UPD \ - "kernel_addr=fff10000\0" \ - "ramdisk_addr=fff20000\0" \ - "kozio=bootm ffc60000\0" \ + "kernel_addr=ff000000\0" \ + "fdt_addr=ff1e0000\0" \ + "ramdisk_addr=ff200000\0" \ "pciconfighost=1\0" \ "pcie_mode=RP:RP:RP\0" \ "" @@ -200,14 +170,9 @@ /* * Commands additional to the ones defined in amcc-common.h */ -#define CONFIG_CMD_CHIP_CONFIG -#define CONFIG_CMD_DATE #define CONFIG_CMD_ECCTEST -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT #define CONFIG_CMD_PCI #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_SNTP #define CONFIG_IBM_EMAC4_V4 1 /* 440SPe has this EMAC version */ #define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */ @@ -246,8 +211,7 @@ *----------------------------------------------------------------------- */ /* General PCI */ -#define CONFIG_PCI /* include pci support */ -#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ +#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ #define CONFIG_PCI_CONFIG_HOST_BRIDGE @@ -271,7 +235,6 @@ #define CONFIG_SYSTEMACE 1 /* Enable SystemACE support */ #define CONFIG_SYS_SYSTEMACE_WIDTH 16 /* Data bus width is 16 */ #define CONFIG_SYS_SYSTEMACE_BASE CONFIG_SYS_ACE_BASE -#define CONFIG_DOS_PARTITION 1 /*----------------------------------------------------------------------- * External Bus Controller (EBC) Setup