X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fkilauea.h;h=f9eaa777725a627f93b5e6b1f719d6a8646b5076;hb=48d0192fe869948fef14b460b5f0c85bca933693;hp=a475f97e62516d9a10d751e99261d4c3cb161e9d;hpb=ce0eb70333331da6942167c41e6841c8c7994a33;p=u-boot

diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index a475f97e62..f9eaa77772 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -223,6 +223,22 @@
  *----------------------------------------------------------------------*/
 #define CFG_MBYTES_SDRAM        (256)		/* 256MB			*/
 
+/*
+ * CONFIG_PPC4xx_DDR_AUTOCALIBRATION
+ *
+ * Note: DDR Autocalibration Method_A scans the full range of possible PPC4xx
+ *       SDRAM Controller DDR autocalibration values and takes a lot longer
+ *       to run than Method_B.
+ * (See the Method_A and Method_B algorithm discription in the file:
+ *	cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c)
+ * Define CONFIG_PPC4xx_DDR_METHOD_A to use DDR autocalibration Method_A
+ *
+ * DDR Autocalibration Method_B is the default.
+ */
+#define	CONFIG_PPC4xx_DDR_AUTOCALIBRATION	/* IBM DDR autocalibration */
+#define	DEBUG_PPC4xx_DDR_AUTOCALIBRATION	/* dynamic DDR autocal debug */
+#undef	CONFIG_PPC4xx_DDR_METHOD_A
+
 #define	CFG_SDRAM0_MB0CF_BASE	((  0 << 20) + CFG_SDRAM_BASE)
 
 /* DDR1/2 SDRAM Device Control Register Data Values */
@@ -386,6 +402,9 @@
 #define CONFIG_HAS_ETH1		1	/* add support for "eth1addr"   */
 #define CONFIG_PHY1_ADDR	2
 
+/* Debug messages for the DDR autocalibration */
+#define CONFIG_AUTOCALIB		"silent\0"  /* default is non-verbose */
+
 /*
  * Default environment variables
  */