X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fkm8360.h;h=c8039e121b2072f9ae63eed0c99d5cb9fd50866b;hb=89ca873e2ddea859526f25f678fa53dda055e90f;hp=230b0545b71ee032515621e6a7a5842598dcf749;hpb=0f2b721c80fa50c8e09548f0ad1b4210d2197bf9;p=u-boot diff --git a/include/configs/km8360.h b/include/configs/km8360.h index 230b0545b7..c8039e121b 100644 --- a/include/configs/km8360.h +++ b/include/configs/km8360.h @@ -3,15 +3,14 @@ * Holger Brunck, Keymile GmbH Hannover, * Christian Herzig, Keymile AG Switzerland, * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_DISPLAY_BOARDINFO + /* KMBEC FPGA (PRIO) */ #define CONFIG_SYS_KMBEC_FPGA_BASE 0xE8000000 #define CONFIG_SYS_KMBEC_FPGA_SIZE 64 @@ -25,6 +24,8 @@ #define CONFIG_KM_BOARD_NAME "kmcoge5ne" #define CONFIG_KM_DEF_NETDEV "netdev=eth1\0" #define CONFIG_CMD_NAND +#define CONFIG_NAND_ECC_BCH +#define CONFIG_BCH #define CONFIG_NAND_KMETER1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define NAND_MAX_CHIPS 1 @@ -98,7 +99,7 @@ #define CONFIG_SYS_DDR_CS0_CONFIG (\ CSCONFIG_EN | \ CSCONFIG_AP | \ - CSCONFIG_ODT_RD_ONLY_CURRENT | \ + CSCONFIG_ODT_WR_ONLY_CURRENT | \ CSCONFIG_BANK_BIT_3 | \ CSCONFIG_ROW_BIT_13 | \ CSCONFIG_COL_BIT_10) @@ -106,7 +107,7 @@ #define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN | CSCONFIG_AP | \ CSCONFIG_ROW_BIT_13 | \ CSCONFIG_COL_BIT_10 | \ - CSCONFIG_ODT_RD_ONLY_CURRENT) + CSCONFIG_ODT_WR_ONLY_CURRENT) #endif #define CONFIG_SYS_DDR_CLK_CNTL (\ @@ -232,7 +233,6 @@ #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U - #ifdef CONFIG_KMCOGE5NE /* BFTIC3: icache cacheable, but dcache-inhibit and guarded */ #define CONFIG_SYS_IBAT6L (\ @@ -266,6 +266,14 @@ BATU_BL_256M |\ BATU_VS |\ BATU_VP) +/* enable POST tests */ +#define CONFIG_POST (CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS) +#define CONFIG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */ +#define CPM_POST_WORD_ADDR CONFIG_SYS_MEMTEST_END +#define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */ +#define CONFIG_TESTPIN_MASK 0x20 /* for kmcoge5ne */ +#define CONFIG_CMD_DIAG /* so that testpin is inquired for POST test */ + #else #define CONFIG_SYS_IBAT6L (0) #define CONFIG_SYS_IBAT6U (0)