X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fkorat.h;h=66cb53337d6d8b01401ccc53b5cc2f1ed50a7f63;hb=862711154339be2af723adcbde217743de781e81;hp=eb2c1d43b4996799e9e8191067558990b639bb67;hpb=6c6e042ab3bbfb5428e4cdeb38fa27728c63afdd;p=u-boot diff --git a/include/configs/korat.h b/include/configs/korat.h index eb2c1d43b4..66cb53337d 100644 --- a/include/configs/korat.h +++ b/include/configs/korat.h @@ -38,6 +38,12 @@ #define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_SYS_CLK_FREQ 33333333 +#ifdef CONFIG_KORAT_PERMANENT +#define CONFIG_SYS_TEXT_BASE 0xFFFA0000 +#else +#define CONFIG_SYS_TEXT_BASE 0xF7F60000 +#endif + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ @@ -64,14 +70,12 @@ #define CONFIG_SYS_FLASH1_MAX_SIZE 0x08000000 #define CONFIG_SYS_FLASH1_ADDR (CONFIG_SYS_FLASH1_TOP - CONFIG_SYS_FLASH1_MAX_SIZE) #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH1_ADDR /* start of FLASH */ -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_OCM_BASE 0xe0010000 /* ocm */ #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE #define CONFIG_SYS_PCI_BASE 0xe0000000 /* Internal PCI regs */ #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */ - -/* Don't change either of these */ -#define CONFIG_SYS_PERIPHERAL_BASE 0xef600000 /* internal peripherals */ +#define CONFIG_SYS_PCI_MEMBASE2 (CONFIG_SYS_PCI_MEMBASE + 0x20000000) #define CONFIG_SYS_USB2D0_BASE 0xe0000100 #define CONFIG_SYS_USB_DEVICE 0xe0000000 @@ -84,19 +88,21 @@ /* 440EPx has 16KB of internal SRAM, so no need for D-Cache */ #undef CONFIG_SYS_INIT_RAM_DCACHE #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_BASE /* OCM */ -#define CONFIG_SYS_INIT_RAM_END (4 << 10) -#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE (4 << 10) +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /* * Serial Port */ +#define CONFIG_CONS_INDEX 1 /* Use UART0 */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK get_serial_clock() #define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* ext. 11.059MHz clk */ #define CONFIG_BAUDRATE 115200 #define CONFIG_SERIAL_MULTI 1 -/* define this if you want console on UART1 */ -#undef CONFIG_UART1_CONSOLE #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} @@ -152,6 +158,7 @@ */ #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ +#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F @@ -282,7 +289,6 @@ #define CONFIG_CMD_ELF #define CONFIG_CMD_FAT #define CONFIG_CMD_I2C -#define CONFIG_I2C_CMD_TREE #define CONFIG_CMD_IRQ #define CONFIG_CMD_MII #define CONFIG_CMD_NET @@ -305,7 +311,6 @@ CONFIG_SYS_POST_SPR | \ CONFIG_SYS_POST_UART) -#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) #define CONFIG_LOGBUFFER #define CONFIG_SYS_POST_CACHE_ADDR 0xC8000000 /* free virtual address */ @@ -360,6 +365,7 @@ /* Board-specific PCI */ #define CONFIG_SYS_PCI_TARGET_INIT #define CONFIG_SYS_PCI_MASTER_INIT +#define CONFIG_SYS_PCI_BOARD_FIXUP_IRQ #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ #define CONFIG_SYS_PCI_SUBSYS_ID 0xcafe /* Whatever */ @@ -551,14 +557,6 @@ } \ } -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */